CMOS Gate Structures Fabricated By Selective Oxidation

A method of fabricating at least one field effect transistor having a sublithographic gate structure comprising the steps of:

• forming a gate dielectric layer on a semiconductor substrate;
• depositing a gate layer on said gate dielectric layer;
• depositing a layer of a mandrel material over said gate layer;
• patterning said layer of mandrel material with the pattern of at least one sacrificial mandrel;
• etching said layer of mandrel material to form at least one sacrificial mandrel;
• converting at least one sub-lithographic edge region of said sacrificial mandrel to an etch-resistant sidewall;
• stripping unconverted portions of said layer of mandrel material selective to said etch-resistant sidewall, leaving at least one etch-resistant sidewall image;
• using said at least one etch-resistant sidewall image as a hardmask, etching said structure layer to form at least one sub-lithographic gate structure;
• and
• completing at least one field effect transistor about said sub-lithographic gate structure.