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US 2007/0190701 A1Published application
Pixel structure and thin film transistor and fabrication method thereof
AssigneeQuanta Display Inc.
InventorChin-Kuo Ting
Life of this patent
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Abstract
A method of fabricating a thin film transistor is disclosed. First, a substrate is provided and a patterned polysilicon layer is formed on the substrate. A metal layer is formed on the patterned polysilicon layer. Then, a portion of the metal layer is removed so that the remaining metal layer beside the patterned polysilicon layer forms a source and a drain. A gate insulation layer is formed on the substrate to cover the source, the drain and the patterned polysilicon layer. A gate is formed on the gate insulation layer over the patterned polysilicon layer.
Claims20
A method for fabricating a thin film transistor, comprising the steps of:
- providing a substrate;
- forming a patterned polysilicon layer on the substrate;
- forming a metal layer over the patterned polysilicon layer and the substrate;
- removing a portion of the metal layer while retaining a portion of the metal layer on the respective sides of the patterned polysilicon layer to form a source and a drain;
- forming a gate insulation layer over the substrate to cover the source, the drain and the patterned polysilicon layer;
- forming a gate on the gate insulation layer;
- forming a first dielectric layer over the substrate to cover the gate insulation layer and the gate;
- forming a first contact opening and a second contact opening in the first dielectric layer and the gate insulation layer to expose the source and the drain respectively;
- and
- forming a first metal contact layer and a second metal contact layer over the first dielectric layer to fill the first contact opening and the second contact opening and connect electrically with the source and the drain respectively.
7 more elements
A method of fabricating a pixel structure, comprising the steps of:
- providing a substrate;
- forming a patterned polysilicon layer on the substrate;
- forming a metal layer over the patterned polysilicon layer and the substrate;
- removing a portion of the metal layer while retaining a portion of the metal layer on the respective sides of the patterned polysilicon layer to form a source, a drain and a data line electrically connected to the source;
- forming a gate insulation layer over the substrate to cover the data line, the source, the drain and the patterned polysilicon layer;
- forming a gate and a scan line electrically connected to the gate on the gate insulation layer;
- forming a first dielectric layer over the substrate to cover the gate and the scan line;
- forming a contact opening in the first dielectric layer and the gate insulation layer to expose the drain;
- and
- forming a pixel electrode on the first dielectric layer to fill the contact opening and connect electrically with the drain.
7 more elements
A method of fabricating a pixel structure, comprising the steps of:
- providing a substrate;
- forming a patterned polysilicon layer on the substrate;
- forming a metal layer over the patterned polysilicon layer and the substrate;
- removing a portion of the metal layer while retaining a portion of the metal layer on the respective sides of the patterned polysilicon layer to form a source, a drain and a data line electrically connected to the source;
- forming a gate insulation layer over the substrate to cover the source, the drain and the patterned polysilicon layer;
- forming a gate on the gate insulation layer and a scan line electrically connected to the gate;
- forming a first dielectric layer over the substrate to cover the gate and the scan line;
- forming a first contact opening and a second contact opening in the first dielectric layer and the gate insulation layer to expose the source and the drain respectively;
- forming a first metal contact layer and a second metal contact layer on the first the first dielectric layer to fill the first contact opening and the second contact opening and connect electrically with the source and the drain respectively;
- forming a second dielectric layer on the first dielectric layer to cover the first metal contact layer and the second metal contact layer;
- forming a third contact opening in the second dielectric layer to expose the second metal contact layer;
- and
- forming a pixel electrode on the second dielectric layer to fill the third contact opening and connect electrically with the second metal contact layer.
10 more elements
A thin film transistor, comprising:
- a patterned polysilicon layer disposed on a substrate;
- a source and a drain disposed on the respective sides of the patterned polysilicon layer, wherein the source and the drain are made of metallic material;
- a gate insulation layer covering the source, the drain and the patterned polysilicon layer;
- a gate disposed on the gate insulation layer over the patterned polysilicon layer;
- a first dielectric layer covering the gate and the gate insulation layer;
- and
- a first metal contact layer and a second metal contact layer disposed in the first dielectric layer and electrically connected to the source and the drain respectively.
4 more elements
A pixel structure, comprising:
- a patterned polysilicon layer disposed on a substrate;
- a source and a drain disposed on the respective sides of the patterned polysilicon layer, wherein the source and the drain are made of metallic material;
- a data line disposed on the substrate and electrically connected to the source;
- a gate insulation layer disposed on the substrate covering the data line, the source, the drain and the patterned polysilicon layer;
- a gate disposed on the gate insulation layer over the patterned polysilicon layer;
- a scan line disposed on the gate insulation layer and electrically connected to the gate;
- a first dielectric layer covering the gate and the scan line;
- and
- a pixel electrode disposed on the first dielectric layer and electrically connected to the drain.
6 more elements
A pixel structure, comprising:
- a patterned polysilicon layer disposed on a substrate;
- a source and a drain disposed over the substrate on the respective sides of the patterned polysilicon layer, wherein the source and the drain are made of metallic material;
- a data line disposed over the substrate and electrically connected to the source;
- a gate insulation layer covering the source, the drain and the patterned polysilicon layer;
- a gate disposed on the gate insulation layer;
- a scan line disposed on the gate insulation layer and electrically connected to the gate;
- a first dielectric layer disposed over the gate and the scan line;
- a first metal contact layer and a second metal contact layer disposed over the first dielectric layer and electrically connected to the source and the drain respectively;
- a second dielectric layer disposed on the first dielectric layer to cover the first metal contact layer and the second metal contact layer;
- and
- a pixel electrode disposed on the second dielectric layer and electrically connected to the second metal contact layer.
8 more elements
Dependencies are inferred from the claim text.