Method of manufacturing semiconductor device
AssigneeCasio Computer Co., Ltd.
InventorNorihiko Kaneko
Life of this patent
Estimating the term…
Abstract
A semiconductor substrate in a wafer state having one surface provided thereon a plurality of external connection electrodes is stacked onto a support film. The wafer-state semiconductor substrate stuck on the support film is cut into a plurality of chip size semiconductor substrates, whereby the adjacent semiconductor substrates are separated from each other, and each semiconductor substrate is provided with at least one of the external connection electrodes. At least one protection film is formed on the other surface of the chip size semiconductor substrates, and on a peripheral side surface thereof that the chip size semiconductor substrates, which are adjacent to each other, are separated from each other.
Claims20
A method of manufacturing a semiconductor device comprising:
- stacking a first surface of a wafer-state semiconductor substrate provided thereon a plurality of external connection electrodes to a first surface of a support film;
- cutting the wafer-state semiconductor substrate stacked on the first surface of the support film into a plurality of chip size semiconductor substrates, whereby the chip size semiconductor substrates adjacent to each other are separated from each other, and said each chip size semiconductor substrate is provided with at least one of the external connection electrodes;
- and
- forming at least one protection film on a second surface of each of the chip size semiconductor substrate, which is opposite to the first surface thereof, and on a peripheral side surface thereof in a state that said plurality of chip size semiconductor substrates, which are adjacent to each other, are separated from each other.
A method of manufacturing a semiconductor device comprising:
- stacking a first surface of a wafer-state semiconductor substrate provided with a plurality of external connection electrodes thereon onto a first surface of a support film;
- cutting the wafer-state semiconductor substrate stacked on the first surface of the support film into a plurality of chip size semiconductor substrates, whereby the chip size semiconductor substrates adjacent to each other are separated from each other, and each of the separated chip size semiconductor substrates is provided with at least one of the external connection electrodes;
- expanding the support film in a plane direction to increase a distance between said plurality of separated chip size semiconductor substrates being adjacent to each other;
- and
- forming at least one protection film, over the entire clearance between said plurality of separated chip size semiconductor substrates being adjacent to each other, on a second surface of each of said chip size semiconductor substrates, which is opposite to the first surface thereof, and on a peripheral side surface thereof in a state that said plurality of chip size semiconductor substrates, which are adjacent to each other, are separated from each other.
A method of manufacturing a semiconductor device comprising:
- stacking a first surface of a wafer-state semiconductor substrate provided with a plurality of columnar electrodes thereon, onto a first surface of a support film;
- providing at least one sealing film on and around the columnar electrodes;
- cutting the wafer-state semiconductor substrate stacked on the first surface of the support film, and separating said at least one sealing film, together with the wafer-state semiconductor substrate, into a plurality of chip size semiconductor substrates, whereby the chip size semiconductor substrates adjacent to each other are separated from each other, and each of the chip size semiconductor substrates is provided with at least one of the external connection electrodes;
- expanding the support film to increase a distance between said plurality of separated chip size semiconductor substrates being adjacent to each other;
- and
- forming at least one protection film, over the entire clearance between said plurality of separated chip size semiconductor substrates being adjacent to each other, on a second surface of said each chip size semiconductor substrate, which is opposite to the first surface thereof, on a peripheral side surface thereof, and on the peripheral side surfaces of said plurality of separated sealing films in a state that said plurality of chip size semiconductor substrates, which are adjacent to each other, are separated from each other.
Dependencies are inferred from the claim text.