Method and apparatus for insertion of filling forms within a design layout

An apparatus comprising:

• a shape processing module to insert a plurality of filling forms within a circuit design layout, each filling form of said plurality of filling forms being configured to eliminate a corresponding jog area of a plurality of jog areas within said circuit design layout;
• and
• a design rule checking module coupled to said shape processing module to identify at least one filling form of said plurality of filling forms that violates at least one predetermined design rule applicable to said circuit design layout;
• said shape processing module further to adapt said at least one filling form to comply with said at least one predetermined design rule and to combine remaining filling forms in compliance with said at least one predetermined design rule within said circuit design layout to form a circuit design output layout.

An apparatus comprising:

• means for inserting a plurality of filling forms within a circuit design layout, each filling form of said plurality of filling forms being configured to eliminate a corresponding jog area of a plurality of jog areas within said circuit design layout;
• means for identifying at least one filling form of said plurality of filling forms that violates at least one predetermined design rule applicable to said circuit design layout;
• means for adapting said at least one filling form to comply with said at least one predetermined design rule;
• and
• means for combining remaining filling forms in compliance with said at least one predetermined design rule within said circuit design layout to form a circuit design output layout.

A computer readable medium containing executable instructions, which, when executed in a processing system, cause said processing system to perform a method comprising:

• inserting a plurality of filling forms within a circuit design layout, each filling form of said plurality of filling forms being configured to eliminate a corresponding jog area of a plurality of jog areas within said circuit design layout;
• identifying at least one filling form of said plurality of filling forms that violates at least one predetermined design rule applicable to said circuit design layout;
• adapting said at least one filling form to comply with said at least one predetermined design rule;
• and
• combining remaining filling forms in compliance with said at least one predetermined design rule within said circuit design layout to form a circuit design output layout.