Method for designing cell layout of semiconductor integrated circuit and computer readable medium in which a cell layout design program is recorded

A method for designing a cell layout of a semiconductor integrated circuit, comprising the steps of:

• determining whether a layout of priority cells is completed;
• performing a layout of general cells when the layout of the priority cells is judged to be completed in the step of determining whether the layout of the priority cells is completed;
• and
• outputting a layout result of each of the priority cells and the general cells;
• wherein
• a layout of the priority cell comprises the steps of:
• inputting cell layout information and priority cell information;
• extracting a layout cell width, a limit of a layout area width, and an arranged area width based on the cell layout information and the priority cell information;
• setting the arranged area width to zero;
• extracting the width of a cell to be arranged;
• calculating a target layout position and X direction of a layout of the cell to be arranged based on the cell layout information and the priority cell information;
• and
• comparing the total of the width of the cell to be arranged and the arranged area width with the limit of the layout area width to determine whether the total of the widths is larger than the limit of the layout area width,
• wherein, when the result of the comparison step is that the total of the widths is larger than the limit of the layout area width, the method comprises the steps of:
• shifting the target layout position in the Y direction and inverts the direction of the layout of the priority cell in the X direction;
• determining whether the priority cell can be arranged at the target layout position;
• if the cell can be arranged, setting the arranged area width to zero;
• and
• if the cell cannot be arranged, tracing back up to a priority cell having a layout option while cutting off priority cells already arranged,
• wherein, when the result of the comparison step is that the total of the widths is not larger than the limit of the layout area width, the method comprises the steps of:
• determining whether the priority cell can be arranged at the target layout position;
• if the cell can be arranged, adding the width of the cell to be arranged to the arranged area width and shifting the target layout position in the X direction;
• and
• if the cell cannot be arranged, performing the steps for the case where the result of the comparison step is that the total of the widths is larger than the limit of layout area width.

A computer readable medium used in a cell layout system of a semiconductor integrated circuit, wherein the medium stores a program for causing a computer to perform a method for designing a cell layout of a semiconductor integrated circuit, the method comprising the steps of:

• inputting information including a floor plan of the semiconductor integrated circuit with a logic circuit, arranged cells and a cell layout-prohibited area which have been predetermined based on the floor plan, priority cells constrained by the circuit performance of the logic circuit which are a group of cells chosen from a plurality of cells whose arrangement order is determined in consideration of a data flow in the logic circuit and which are other than the arranged cells, general cells other than the arranged cells and the priority cells, and a limit of a cell layout width which determines a layout range of the priority cells;
• extracting cells which have been already arranged in a direction in which the priority cell is to be arranged, or a cell layout-prohibited area;
• arranging the priority cell in a layout area determined by the limit of the cell layout width, avoiding the extracted arranged cell or the cell layout-prohibited area;
• arranging the general cells after completion of layout of the priority cells;
• and
• outputting a layout result of each of the priority cells and the general cells.

A computer readable medium used in a cell layout system of a semiconductor integrated circuit, wherein the medium stores a program for causing a computer to perform a method for designing a cell layout of the semiconductor integrated circuit, the method comprising the steps of:

• determining whether a layout of priority cells is completed;
• performing a layout of general cells when the layout of the priority cells is judged to be completed in the step of determining whether the layout of the priority cells is completed;
• and
• outputting a layout result of each of the priority cells and the general cells;
• wherein
• the layout of the priority cell comprises the steps of:
• inputting cell layout information and priority cell information;
• extracting a layout cell width, a limit of a layout area width, and an arranged area width based on the cell layout information and the priority cell information;
• setting the arranged area width to zero;
• extracting the width of a cell to be arranged;
• calculating a target layout position and X direction of a layout of the cell to be arranged based on the cell layout information and the priority cell information;
• and
• comparing the total of the width of the cell to be arranged and the arranged area width with the limit of the layout area width to determine whether the total of the widths is larger than the limit of the layout area width,
• wherein, when the result of the comparison step is that the total of the widths is larger than the limit of the layout area width, the method comprises the steps of:
• shifting the target layout position in the Y direction and inverts the direction of the layout of the priority cell in the X direction;
• determining whether the priority cell can be arranged at the layout target;
• if the cell can be arranged, setting the arranged area width to zero;
• and
• if the cell cannot be arranged, tracing back up to a priority cell having a layout option while cutting off priority cells already arranged,
• wherein, when the result of the comparison step is that the total of the widths is not larger than the limit of the layout area width, the method comprises the steps of:
• determining whether the priority cell can be arranged at the layout target;
• if the cell can be arranged, adding the width of the cell to be arranged to the arranged area width and shifting the target layout position in the X direction;
• and
• if the cell cannot be arranged, performing the steps for the case when the result of the comparison step is that the total of the widths is larger than the limit of the layout area width.