Method, medium, and apparatus with interrupt handling in a reconfigurable array

A reconfigurable array control method, the method comprising:

• suspending an operation in a reconfigurable array when an interrupt request occurs during execution of the operation by the reconfigurable array;
• executing an interrupt service with select processing units in response to the interrupt request by using a dedicated register for the interrupt service;
• and
• resuming the operation in the reconfigurable array after completing the interrupt service in the select processing units.

A reconfigurable array control method, the method comprising:

• computing a programmed threshold time with regard to an operation to be executed in a reconfigurable array;
• comparing a current cycle time of the operation with the programmed threshold time when an interrupt request occurs during the execution of the operation by the reconfigurable array;
• and
• discarding the interrupt request when the current cycle time is greater than the programmed threshold time.

A reconfigurable array control method, the method comprising:

• executing an interrupt service in select processing units of a reconfigurable array in response to an interrupt request when the interrupt request occurs during an execution of an operation by the reconfigurable array in a reconfigurable array mode;
• storing a context for an instruction set processor mode before converting the instruction set processor mode into the reconfigurable array mode, with the instruction set processor mode including select processing units, of the reconfigurable array, used in the instruction set processor mode that are also used in the reconfigurable array mode;
• and
• restoring the context for the instruction set processor mode after completion of the interrupt service by the select processing units.

A computing apparatus, comprising:

• a reconfigurable array comprising a plurality of processing units;
• and
• an interrupt controller to store register values of at least one register for select processing units of the reconfigurable array to be used for handling an interrupt request, to execute an interrupt service by the select processing units in response to the interrupt request, and to restore the register values to the at least one register upon completion of the interrupt service by the select processing units,
• wherein the reconfigurable array selectively pauses execution of an operation being executed by the reconfigurable array upon receipt of the interrupt request, and selectively resumes executing the operation upon completion of the interrupt service.

A computing apparatus, comprising:

• a reconfigurable array comprising a plurality of processing units;
• and
• a plurality of shadow registers each corresponding to one register selected among registers used in an instruction set processor mode,
• wherein the reconfigurable array selectively pauses execution of an operation being executed by the plurality of processing units of the reconfigurable array upon receipt of an interrupt request, executes an interrupt service using select processing units, of the plurality of processing units, in response to the interrupt by using the shadow registers, and resumes executing the operation upon completion of the interrupt service using the plurality of processing units.