Digital signal processor with variable length instruction set
AssigneeQUALCOMM Incorporated
InventorsGilbert Sih, Qiuzhen Zou, Jian Lin
Life of this patent
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Abstract
A digital signal processor uses a variable length instruction set. The variable length instructions may be stored in adjacent locations within memory space. The beginning and ending of instructions may, but are not required to, occur across memory word boundaries. Preferably, the variable length instructions contain variable numbers of instruction fragments. Each instruction fragment causes a particular operation (or operations) to be performed, thereby allowing multiple operations to be performed during each clock cycle. This reduces the total number of clock cycles necessary to perform a task.
Claims1
A system for controlling a digital signal processor comprising:
- a memory having an address space addressable at address words, each of said address words having a front edge word boundary and a back edge boundary,
- a set of variable length instructions stored in said memory, each of said variable length instructions having a front edge instruction boundary and a back edge boundary, wherein
- a first portion of said variable length instructions have front edge instruction boundaries which correspond to said front edge word boundaries or have back edge instruction boundaries which correspond to said back edge word boundaries, and
- a second portion of said variable length instructions have front edge instruction boundaries which are different than said front edge word boundaries and have back edge instruction boundaries which are different than said back edge word boundaries.
Dependencies are inferred from the claim text.