Shared interface for components in an embedded system

A method for accessing a non-volatile memory via a non-volatile memory controller, the method comprising:

• issuing an access command to the non-volatile memory via a non-volatile memory interface;
• receiving data via the non-volatile memory interface;
• and
• transferring the received data using shared control signals of a shared interface, wherein the shared control signals are issued to a host processor and a volatile memory, and wherein the received data is transferred to one of the host processor and the volatile memory.

A system, comprising:

• a volatile memory;
• a non-volatile memory;
• a non-volatile memory controller configured to access the non-volatile memory via a non-volatile memory interface;
• a shared interface including shared control signals, wherein the shared control signals are received by the non-volatile memory controller and the volatile memory via the shared interface;
• and
• a host processor configured to:
• select one of the non-volatile memory controller and the volatile memory;
• and
• issue access commands via the shared controls signals of the shared interface to the selected one of the non-volatile memory controller and the volatile memory.

A non-volatile memory controller, comprising:

• a non-volatile memory interface;
• a shared interface for receiving shared control signals issued by a host processor to the non-volatile memory and a volatile memory;
• and
• circuitry configured to:
• determine if the shared control signals indicate that the non-volatile memory controller is selected via the shared interface;
• if so:
• receive access commands via shared control signals of the shared interface;
• in response to receiving the access commands, issue access commands to a non-volatile memory via the non-volatile memory interface;
• and
• receive requested data from the non-volatile memory via the non-volatile memory interface.

A volatile memory, comprising:

• shared control signals received via a shared interface;
• a synchronous port;
• an asynchronous port;
• and
• circuitry configured to:
• receive first commands via the shared control signals;
• in response to receiving the first commands via the shared control signals, transfer data via the synchronous port;
• receive second commands via the shared control signals;
• and
• in response to receiving the second commands via the shared control signals;
• transfer data via the asynchronous port.

A system, comprising:

• a volatile means for storing;
• a non-volatile means for storing;
• a means for controlling configured to access the non-volatile means for storing via a non-volatile means for memory interfacing;
• a shared means for interfacing including shared control signals, wherein the shared control signals are received by the means for controlling and the volatile means for storing via the shared means for interfacing;
• a means for processing configured to:
• select one of the means for controlling and the means for storing;
• and
• issue access commands via the shared controls signals of the shared means for interfacing to the selected one of the means for controlling and the volatile means for storing.

A method for accessing a non-volatile memory controller and a volatile memory via a shared interface, comprising:

• selecting one of the non-volatile memory controller and the volatile memory via shared control signals of the shared interface, wherein the shared control signals are issued to the non-volatile memory controller and the volatile memory;
• issuing commands to the selected one of the non-volatile memory controller and the volatile memory via the shared control signals;
• and
• receiving data from the selected one of the non-volatile memory controller and the volatile memory, wherein the data is received via an first port of the non-volatile memory controller when the non-volatile memory controller is selected and wherein the data is received via a second port of the volatile memory when the volatile memory is selected.