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US 2007/0186022 A1Published application
Interrupt control system and method for reducing interrupt latency
AssigneeTexas Instruments Incorporated
InventorsJing-Fei Ren, Ping Tao
Life of this patent
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Abstract
An interrupt control system is disclosed. The interrupt control system can include control logic that provides at least one interrupt request signal to a processor in response to at least one event signal. The control logic provides at least one computer executable instruction to a processor in response to detecting an instruction request from the processor corresponding to an interrupt response.
Claims20
An interrupt control system comprising:
- control logic that provides at least one interrupt request signal to a processor in response to at least one event signal, the control logic providing at least one computer executable instruction to a processor in response to detecting an instruction request from the processor corresponding to an interrupt response.
An interrupt control system comprising:
- means for detecting at least one event signal and for providing an interrupt signal to a processor in response to the at least one event signal;
- means for providing at least one computer executable instruction to the processor in response to detecting an interrupt response from the processor.
A method, comprising:
- receiving at least one event signal from a peripheral device indicating the occurrence of an interrupt event;
- providing an interrupt request signal to a processor in response to the event signal;
- detecting an instruction request sent from the processor to an instruction random access memory (I-RAM);
- retrieving at least one computer executable instruction that is associated with the at least one event signal if the instruction request is an interrupt response from the processor;
- and
- providing the at least one computer executable instruction to the processor.
3 more elements
Dependencies are inferred from the claim text.