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US 2007/0184642 A1Published application
Recessed poly extension T-gate
AssigneeFreescale Semiconductor, Inc.
InventorJames Boyd
Life of this patent
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Abstract
A method is provided for making a silicided gate in a semiconductor device. In accordance with the method, a gate (213) is provided which comprises a first portion (214) and a second portion (213). The first portion of the gate has a width w1 and the second portion of the gate has a width w2 as taken along a plane perpendicular to the length of the gate, wherein w2>w1. A layer is silicide (231) is then formed on the second portion.
Claims15
A method for making a silicided gate, comprising:
- providing a gate comprising a first portion and a second portion, wherein the first portion has a width w1 and the second portion has a width w2 as taken along a plane perpendicular to the length of the gate, and wherein w2>w1;
- and
- forming a layer of silicide on the second portion of the gate.
Dependencies are inferred from the claim text.