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US 2007/0184632 A1Published application
Method of fabricating a semiconductor device
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorsShunpei Yamazaki, Hisashi Ohtani
Life of this patent
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Abstract
A semiconductor device with high reliability is provided using an SOI substrate. When the SOI substrate is fabricated by using a technique typified by SIMOX, ELTRAN, or Smart-Cut, a single crystal semiconductor substrate having a main surface (crystal face) of a {110} plane is used. In such an SOI substrate, adhesion between a buried insulating layer as an under layer and a single crystal silicon layer is high, and it becomes possible to realize a semiconductor device with high reliability.
Claims49
1-12. (canceled)
A semiconductor device comprising:
- a single crystalline semiconductor layer comprising silicon formed on an insulating surface, the single crystalline semiconductor layer having at least a channel formation region and source and drain regions;
- a gate insulating film formed on the single crystalline semiconductor layer;
- a gate electrode formed over the channel formation region with the gate insulating film interposed therebetween wherein the gate electrode includes a metal layer which contacts the gate insulating film;
- etching stoppers formed on side surfaces of the gate electrode;
- side walls formed adjacent to the side surfaces of the gate electrode with the etching stoppers interposed therebetween;
- and
- an insulating film comprising silicon nitride formed over the single crystalline semiconductor layer and the gate electrode.
4 more elements
A semiconductor device comprising:
- a single crystalline semiconductor layer comprising silicon formed on an insulating surface, the single crystalline semiconductor layer having at least a channel formation region and source and drain regions;
- a gate insulating film formed on the single crystalline semiconductor layer;
- a gate electrode comprising poly silicon formed over the channel formation region with the gate insulating film interposed therebetween;
- etching stoppers formed on side surfaces of the gate electrode;
- side walls comprising silicon nitride formed adjacent to the side surfaces of the gate electrode with the etching stoppers interposed therebetween, respectively;
- and
- an insulating film comprising silicon nitride formed over the single crystalline semiconductor layer and the gate electrode,
- wherein an upper surface of the gate electrode and at least a part of the source and drain regions comprise a metal silicide.
5 more elements
A semiconductor device comprising:
- a single crystalline semiconductor layer comprising silicon formed on an insulating surface, the single crystalline semiconductor layer having at least a channel formation region and source and drain regions;
- a gate insulating film formed on the single crystalline semiconductor layer;
- a gate electrode formed over the channel formation region with the gate insulating film interposed therebetween wherein the gate electrode includes a metal layer which contacts the gate insulating film;
- etching stoppers formed on side surfaces of the gate electrode;
- side walls formed adjacent to the side surfaces of the gate electrode with the etching stoppers interposed therebetween;
- and
- an insulating film comprising silicon nitride oxide formed over the single crystalline semiconductor layer and the gate electrode.
4 more elements
A semiconductor device comprising:
- a single crystalline semiconductor layer comprising silicon formed on an insulating surface, the single crystalline semiconductor layer having at least a channel formation region and source and drain regions;
- a gate insulating film formed on the single crystalline semiconductor layer;
- a gate electrode comprising poly silicon formed over the channel formation region with the gate insulating film interposed therebetween;
- etching stoppers formed on side surfaces of the gate electrode;
- side walls comprising silicon nitride formed adjacent to the side surfaces of the gate electrode with the etching stoppers interposed therebetween, respectively;
- and
- an insulating film comprising silicon nitride oxide formed over the single crystalline semiconductor layer and the gate electrode,
- wherein an upper surface of the gate electrode and at least a part of the source and drain regions comprise a metal silicide.
5 more elements
A semiconductor device comprising:
- a single crystalline semiconductor layer comprising silicon formed on an insulating surface, the single crystalline semiconductor layer having at least a channel formation region and source and drain regions;
- a gate insulating film formed on the single crystalline semiconductor layer;
- a gate electrode formed over the channel formation region with the gate insulating film interposed therebetween wherein the gate electrode includes a metal layer which contacts the gate insulating film;
- etching stoppers formed on side surfaces of the gate electrode;
- side walls formed adjacent to the side surfaces of the gate electrode with the etching stoppers interposed therebetween;
- a first insulating film formed over the single crystalline semiconductor layer and the gate electrode;
- a first electrode formed on the first insulating film and electrically connected to one of the source and drain regions;
- a second leveling insulating film formed over the first electrode and the first insulating film;
- a second electrode formed on the second leveling insulating film;
- and
- a third leveling insulating film formed over the second electrode and the second leveling insulating film.
8 more elements
A semiconductor device comprising:
- a single crystalline semiconductor layer comprising silicon formed on an insulating surface, the single crystalline semiconductor layer having at least a channel formation region and source and drain regions;
- a gate insulating film formed on the single crystalline semiconductor layer;
- a gate electrode comprising poly silicon formed over the channel formation region with the gate insulating film interposed therebetween;
- etching stoppers formed on side surfaces of the gate electrode;
- side walls comprising silicon nitride formed adjacent to the side surfaces of the gate electrode with the etching stoppers interposed between the side walls and the side surfaces of the gate electrode;
- a first insulating film formed over the single crystalline semiconductor layer and the gate electrode;
- a first electrode formed on the first insulating film and electrically connected to one of the source and drain regions;
- a second leveling insulating film formed over the first electrode and the first insulating film;
- a second electrode formed on the second leveling insulating film;
- and
- a third leveling insulating film formed over the second electrode and the second leveling insulating film,
- wherein an upper surface of the gate electrode and at least a part of the source and drain regions comprise a metal silicide.
9 more elements
Dependencies are inferred from the claim text.