Selective incorporation of charge for transistor channels
AssigneeInternational Business Machines Corporation
InventorsJohn Hergenrother, Zhibin Ren, Dinkar Singh, Jeffrey Sleight
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AssigneeInternational Business Machines Corporation
InventorsJohn Hergenrother, Zhibin Ren, Dinkar Singh, Jeffrey Sleight
Estimating the term…
A device and method for selective placement of charge into a gate stack includes forming gate stacks including a gate dielectric adjacent to a transistor channel and a gate conductor and forming doped regions for transistor operation. A layer rich in a passivating element is deposited over the doped regions and the gate stack, and the layer rich the passivating element is removed from selected transistors. The layer rich in the passivating element is than annealed to drive-in the passivating element to increase a concentration of charge at or near transistor channels on transistors where the layer rich in the passivating element is present. The layer rich in the passivating element is removed.
A method for selective placement of charge into a gate stack comprising:
A method for placing charge into a field effect transistor (FET) gate stack for complementary metal oxide semiconductor (CMOS) devices, comprising:
An integrated circuit, comprising:
Dependencies are inferred from the claim text.