Method and Process Intermediate for Electrostatic Discharge Protection in Flat Panel Imaging Detectors
AssigneePerkinElmer, Inc.
InventorZhong Huang
Life of this patent
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Abstract
Shorting bars are provided for electrostatic discharge protection as a portion of trace deposition in a photodiode array. During normal processing for etching of the metal layers, the shorting bars are removed without additional processing requirements. Additional shorting elements are provided by employing FET silicon layers having traces in contact with the array traces to provide extended ESD protection until removal of those shorting elements during normal processing for opening vias for photodiode bottom contact.
Claims6
A method for providing electrostatic discharge protection during fabrication processing of photodiode array panels comprising the steps of:
- conducting a TFT deposition process to first generate a plurality of FET silicon dielectric layers, at least one of which is undoped;
- capping the dielectric layers by a thin metal layer having shorting bar traces for ESD protection;
- depositing a second metal layer for the traces in the array having contact with the shorting bar traces;
- metal etching to remove the metal shorting bars leaving metal traces with all metal traces still connected through undoped FET silicon bars to continuously provide a leakage current path for static charges,
- depositing a passivation layer;
- opening vias at each pixel in the array for photodiode bottom contact and a via above each FET silicon shorting bar;
- and,
- etching the FET silicon for diodes and simultaneously removing the undoped FET silicon bars to completely isolate all traces.
Dependencies are inferred from the claim text.