CMOS Image Sensor Integrated with 1-T SRAM and Fabrication Method Thereof
AssigneeUnited Microeletronics Corp.
InventorJinsheng Yang
Life of this patent
Estimating the term…
Abstract
A CMOS image sensor integrated with 1T-SRAM is provided on a substrate having a pixel array part, a logic circuit part, and a memory part by adding only one photoresist process. There are a plurality of CMOS image sensor devices in the pixel array part, a logic circuit in the logic circuit part, and a plurality of 1T-SRAMs in the memory part, and each part is isolated by a plurality of STI regions. The 1T-SRAM includes a capacitor structure and a transistor. The capacitor structure includes a well region as a bottom capacitor plate, a capacitor dielectric layer, and a top capacitor plate formed on the substrate respectively. The transistor includes a gate dielectric layer, a gate, a drain, and a source continuous with and electrically connected to the well region.
Claims12
A method for integrating a CMOS image sensor with 1T-SRAM, comprising the following steps:
- providing a substrate having a pixel array part, a logic circuit part, and a memory part;
- forming a plurality of wells and swallow trench isolation (STI) regions in the pixel array part, the logic circuit part, and the memory part;
- forming at least a bottom capacitor plate in the well in the memory part;
- forming a dielectric layer on the substrate;
- forming a plurality of the gates of the transistors on the dielectric layer in the pixel array part, the logic circuit part, and the memory part;
- forming a plurality of image sensor devices in the pixel array part;
- and
- forming sources and drains of the transistors in the substrate.
Dependencies are inferred from the claim text.