Clock and data recovery circuit including first and second stages
OwnerAnthony Sanders, Dirk Scheideler +1inventors
InventorsAnthony Sanders, Dirk Scheideler, Edoardo Prete
Life of this patent
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Abstract
A clock and data recovery circuit including a first circuit and a second circuit. The first circuit is configured to receive a clock signal and a phase control signal and to lock onto the clock signal and provide a cleaned clock signal. The second circuit is configured to receive a data signal and the cleaned clock signal and to sample the data signal via the cleaned clock signal and provide the phase control signal. The first circuit adjusts the phase of the cleaned clock signal based on the phase control signal.
Claims30
A clock and data recovery circuit comprising:
- a first circuit configured to receive a clock signal and a phase control signal and to lock onto the clock signal and provide a cleaned clock signal;
- and
- a second circuit configured to receive a data signal and the cleaned clock signal and to sample the data signal via the cleaned clock signal and provide the phase control signal, wherein the first circuit adjusts the phase of the cleaned clock signal based on the phase control signal.
A system comprising:
- a clock and data recovery circuit configured to receive a clock signal and a data signal and provide a cleaned clock signal and recovered data, wherein the clock signal and the data signal include correlated phase changes and the clock and data recovery circuit comprises:
- a first circuit configured to receive the clock signal and a phase control signal and to lock onto the clock signal and provide the cleaned clock signal;
- and
- a second circuit configured to receive the data signal and the cleaned clock signal and to sample the data signal via the cleaned clock signal and provide the phase control signal, wherein the first circuit is configured to adjust the phase of the cleaned clock signal based on the correlated phase changes and the phase control signal.
A clock and data recovery circuit comprising:
- means for locking onto a clock signal to provide a cleaned clock signal;
- means for sampling a data signal via the cleaned clock signal;
- means for providing a phase control signal;
- and
- means for adjusting the phase of the cleaned clock signal based on the phase control signal.
A method for recovering clock and data signals comprising:
- locking onto a clock signal to provide a cleaned clock signal;
- sampling a data signal using the cleaned clock signal;
- providing a phase control signal;
- and
- adjusting the phase of the cleaned clock signal based on the phase control signal.
A method for recovering clock and data signals comprising:
- receiving a clock signal and a data signal that include correlated phase changes;
- locking onto the clock signal to provide a cleaned clock signal;
- adjusting the phase of the cleaned clock signal based on the correlated phase changes that occur at a frequency of up to at least 100 MHz;
- sampling the data signal via the cleaned clock signal;
- providing a phase control signal;
- and
- adjusting the phase of the cleaned clock signal based on the phase control signal.
Dependencies are inferred from the claim text.