Method and system for providing indeterminate read data latency in a memory system

A method for providing indeterminate read data latency at a memory controller, the method comprising:

• sending a memory data request from the memory controller to a memory module via a downstream bus, the memory module including a hub device;
• receiving and processing the memory data request on the memory module;
• sending a response data packet from the memory module to the memory controller via an upstream bus, the response data packet including a frame start indicator and an identification tag;
• determining if the response data packet has been received at the memory controller using at least the frame start indicator;
• and
• correlating the received response data packet with the memory data request based on the identification tag included in the response data packet.

A memory system comprising:

• a memory controller including;
• an upstream channel for receiving one or more read data packets at an unpredicted time;
• and
• computer instructions for correlating the received read data packets with their corresponding read data request commands using identification tags included in the read data packets;
• one or more memory modules with one or more memory devices connected to the memory controller by a daisy chained channel, wherein the read data is returned to the memory controller as the read data packets using a frame format that includes the identification tag and a frame start indicator;
• and
• one or more hub devices on the memory modules for buffering address, commands and data, the hub devices including controller channel buffers used in conjunction with a preemptive local data merge algorithm to minimize read data latency and enable indeterminate read data return times to the memory controller.