Erase operation in a flash memory device

A method for erasing a flash memory device comprising a memory array having a plurality of cells organized in rows and columns, the method comprising:

• erasing a predetermined portion of the memory array comprising a first cell;
• programming the first cell of the plurality of cells to a first threshold voltage, the first cell located in a first row and a first column;
• programming a plurality of adjacent cells that are adjacent to the first cell;
• measuring a second threshold voltage for the first cell;
• generating a threshold voltage difference in response to the first and second threshold voltages;
• and
• if the threshold voltage difference is greater than or equal to a predetermined threshold, performing a soft programming operation on the first cell.

A method for erasing a flash memory device comprising a memory array having a plurality of cells organized in rows and columns, the method comprising:

• performing a block erase on a first memory block;
• performing a soft programming operation on the first memory block;
• performing an erase verification on the first memory block;
• programming, to a first threshold voltage, a byte of cells of the first memory block;
• programming a plurality of adjacent cells that are adjacent to the byte of cells;
• measuring a second threshold voltage for the byte of cells;
• generating a threshold voltage difference in response to the first and second threshold voltages;
• and
• if the threshold voltage difference is greater than or equal to a predetermined threshold, performing a soft programming operation on the byte of cells until the threshold voltage difference is less than the predetermined threshold.

An electronic system comprising:

• a processor that generates memory device control signals;
• and
• a memory device, coupled to the processor, that is adapted to be programmed and erased in response to the control signals, the memory device comprising:
• a memory array arranged in rows and columns such that the rows comprise word lines coupled to control gates of a plurality of memory cells and the columns comprise bit lines coupled to series strings of memory cells, the memory array further arranged in memory blocks;
• and
• control circuitry that is adapted to control programming of the memory cells by programming a first cell of the plurality of cells to a first threshold voltage, the first cell located in a first word line and a first bit line, programming at least one adjacent cell that is adjacent to the first cell, measuring a second threshold voltage for the first cell, generating a threshold voltage difference in response to the first and second threshold voltages, and if the threshold voltage difference is greater than or equal to a predetermined threshold, performing a soft programming operation on the first cell.

A memory module comprising:

• a memory array arranged in rows and columns such that the rows comprise word lines coupled to control gates of a plurality of memory cells and the columns comprise bit lines coupled to series strings of memory cells, the memory array further arranged in memory blocks;
• and
• control circuitry that is adapted to control programming of the memory cells by programming a first cell of the plurality of cells to a first threshold voltage, the first cell located in a first word line and a first bit line, programming at least one adjacent cell that is adjacent to the first cell, measuring a second threshold voltage for the first cell, generating a threshold voltage difference in response to the first and second threshold voltages, and if the threshold voltage difference is greater than or equal to a predetermined threshold, performing a soft programming operation on the first cell;
• and
• a plurality of contacts configured to provide selective contact between the memory array and a host system.

A method for erasing a flash memory device comprising a memory array having a plurality of cells organized in rows and columns, the method comprising:

• performing a block erase on a first memory block until a first verification operation determines that the first memory block is successfully erased;
• performing a soft programming operation on the first memory block until a second verification operation determines that a threshold voltage of each cell in the first memory block has been raised a predetermined amount;
• programming, to a first threshold voltage, a byte of cells of the first memory block;
• programming a plurality of adjacent cells that are adjacent to the byte of cells;
• measuring a second threshold voltage for the byte of cells;
• generating a threshold voltage difference in response to the first and second threshold voltages;
• and
• if the threshold voltage difference is greater than or equal to a predetermined threshold, performing a soft programming operation on the byte of cells until the threshold voltage difference is less than the predetermined threshold.

A method for erasing a flash memory device comprising a memory array having a plurality of cells organized in rows and columns, the method comprising:

• performing a block erase on a first memory block until a first verification operation determines that the first memory block is successfully erased;
• performing a soft programming operation on the first memory block;
• programming, to a first threshold voltage, a byte of cells of the first memory block;
• programming a plurality of adjacent cells that are adjacent to the byte of cells;
• measuring a second threshold voltage for the byte of cells;
• generating a threshold voltage difference in response to the first and second threshold voltages;
• and
• if the threshold voltage difference is greater than or equal to a predetermined threshold, performing a soft programming operation on the byte of cells until the threshold voltage difference is less than the predetermined threshold.