Nonvolatile semiconductor memory device and data writing method therefor

A nonvolatile semiconductor memory device comprising:

• a memory cell array which has a plurality of data writable memory cells arranged therein, each memory cell having a floating gate electrode stacked on an element region surrounded by an element isolation region on a semiconductor substrate with a first insulating film disposed therebetween and a control gate electrode stacked on the floating gate electrode with a second insulating film disposed therebetween;
• a row decoder which is connected to the memory cell array and selectively drives the control gate electrode when the memory cell is selected;
• and
• a detrap pulse supply circuit which is connected to the row decoder and generates a detrap pulse signal after data is written into each of the plurality of memory cells, the row decoder causes the detrap pulse signal to the control gate electrode of the selected memory cell to extract charges from the second insulating film.

A data write method for a data writable memory cell transistor having a floating gate electrode stacked on a semiconductor substrate with a first insulating film disposed therebetween and a control gate electrode stacked on the floating gate electrode with a second insulating film disposed therebetween, comprising:

• supplying write voltage to the control gate electrode to write data into the memory cell;
• reading out data from the memory cell into which data has been written and verifying a write state;
• and
• supplying a detrap pulse signal to the control gate electrode to extract charges from the second insulating film after it is verified that a write process with respect to the memory cell has been performed.