US 2007/0183204 A1 · NAND-type nonvolatile memory devices having common bit lines and methods of operating the same

Abstract

A NAND-type nonvolatile memory device includes a first string and a second string. The ends of each of the first and second strings are connected to a common bit line and a common source line, respectively. Each of the first string and the second string have a string selection transistors, a plurality of unit devices and a source selection transistor. Word lines are respectively connected to control gates of the unit devices in the same rows. A first string selection line and a second string selection line are respectively connected to the gates of the string selection transistors of the first string and the second string. A first source selection line and a second source selection line are respectively connected to the gates of the first string and the second string.

Claims20

Dependent claims

A nonvolatile memory device comprising:

a first pair of strings including,
a first string having a first string selection transistor, a plurality of first unit devices and a first source selection transistor connected in series;
a second string having a second string selection transistor, a plurality of second unit devices, and a second source selection transistors connected in series;
a plurality of word lines, each word line being connected to a control gate of a first unit device and a control gate of a corresponding second unit, the first and corresponding second unit device being located in a same row of the first string and the second string;
a first common bit line connecting one end of each of the first string and the second string;
and
a first common source line connecting another end of the first string and the second string.

4 more elements

A method of operating a nonvolatile memory device, the method comprising:

selectively storing data in one of a plurality of unit devices of a first pair of strings by supplying a first voltage to a channel of a plurality of unit devices of a first string, supplying a second voltage to a channel of a plurality of unit devices of a second string, supplying a third voltage to a word line connected to a gate of the one of the plurality of unit devices in which data is to be stored, and supplying a fourth voltage to word lines connected to gates of the other of the plurality of unit devices;
and
reading data stored in the one of the plurality of unit devices;
wherein
the first and the second voltage are different.

2 more elements

Dependencies are inferred from the claim text.

NAND-type nonvolatile memory devices having common bit lines and methods of operating the same

Life of this patent

NAND-type nonvolatile memory devices having common bit lines and methods of operating the same

Life of this patent

Abstract

Claims20