Nonvolatile semiconductor memory device provided with data register for temporally holding data in memory array

A nonvolatile semiconductor memory device comprising:

• a nonvolatile memory cell array including a plurality of memory cells;
• a data register including a plurality of memory cells, for temporally holding read data from said nonvolatile memory cell array and written data to said nonvolatile memory cell array;
• a signal generation circuit for outputting a first signal including a pulse every reading or writing cycle with respect to said data register in a first mode, and generating a first signal by masking the signal including the pulse every reading or writing cycle with respect to said data register when reading or writing with respect to a memory cell other than a predetermined memory cell in said data register is designated in a second mode;
• and
• a first precharge circuit for precharging a bit line pair connected to the memory cell in said data register in response to activation of said first signal, wherein
• said signal generation circuit cancels said masking when reading or writing with respect to said predetermined memory cell in said data register is designated in said second mode.