Page buffer circuit of flash memory device and program operation method thereof
AssigneeHynix Semiconductor Inc.
InventorJun Seop Chung
Life of this patent
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Abstract
A page buffer circuit includes a bit line selection circuit, a main register, a program transmission circuit, a temporary register, and a verification transmission circuit. The verification transmission circuit transmits data stored in the temporary register to the main register through a sensing node in response to a transmission control signal during a program verification operation. A memory cell that has been determined to be programmed in a previous program verification process is verified again in a next program verification process.
Claims14
A page buffer circuit of a flash memory device, comprising:
- a main register to store first or second input data according to an input control signal, the main register being coupled to a sensing node coupled to a bit line selection circuit to store first sensing data of the sensing node according to a first latch control signal;
- a program transmission circuit provided between the main register and the sensing node, the program transmission circuit configured to receive the first sensing data, the first input data, or the second input data at a given time and output one of the data received from the main register to the sensing node in response to a program control signal;
- a temporary register coupled to the sensing node and store second sensing data in response to a second latch control signal;
- and
- a verification transmission circuit to transmit the second sensing data to the main register through the sensing node in response to a transmission control signal during a program verification operation.
A program operation method for a page buffer circuit in a flash memory device, the method comprising:
- storing input data in a main register;
- transmitting the input data from a main register to a temporary register through a sensing node;
- programming the input data stored in the main register into a memory cell as program data;
- transferring the input data from the temporary register to the main register through the sensing node;
- generating a verification signal indicating a program state of the memory cell based on data read from the memory cell;
- and
- determining whether or not the memory cell has been programmed correctly by using the verification signal.
Dependencies are inferred from the claim text.