Non-volatile memory device with periodic refresh and method of programming such a device
AssigneeSTMicroelectronics S.r.l.
InventorsPhilippe Gendrier, Philippe Candelier, Jean-Marc Tessier
Life of this patent
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Abstract
A non-volatile memory device includes a network of non-volatile memory cells, each comprising a floating-gate transistor, said network of cells being intended to store data in the form of a set of data words. The device includes a circuit which detects loss of charges stored in the cells and then reprograms the cells for which a loss of charges has been detected so as to restore the level of stored charges.
Claims26
A non-volatile memory device, comprising:
- a network of non-volatile memory cells each comprising a floating-gate transistor, said network of cells for storing data in the form of a set of data words;
- means for periodically detecting losses of charges stored in the memory cells;
- and
- means for reprogramming the cells for which a loss of charges has been detected so as to restore the level of stored charges.
A method of programming a non-volatile memory device comprising a network of non-volatile memory cells each comprising a floating-gate transistor, according to which the data is written into memory in the form of a set of data words, comprising:
- periodically detecting losses of charges stored in the cells;
- and
- rewriting the data in the cells for which a loss of charges has been detected so as to restore the level of charges stored.
A non-volatile memory device, comprising:
- a matrix of non-volatile memory cells, each cell being of a floating gate type which stores charge indicative of logic state;
- a read circuit that reads individual non-volatile memory cells to detect a loss of stored charge in those cells;
- and
- a programming circuit, responsive to read circuit detection of a loss of stored charge, which reprograms such non-volatile memory cells for which loss of stored charge is detected so as to restore charge.
A method for programming a non-volatile memory device comprising a matrix of non-volatile memory cells, each cell being of a floating gate type which stores charge indicative of logic state, comprising:
- reading individual non-volatile memory cells to detect a loss of stored charge in those cells;
- and
- responsive to read circuit detection of a loss of stored charge, reprogramming such non-volatile memory cells for which loss of stored charge is detected so as to restore charge.
A non-volatile memory device, comprising:
- a matrix of non-volatile memory cells, each cell being of a floating gate type which stores charge indicative of logic state;
- a programming circuit operating to program logic states into individual memory cells of the matrix, the programming circuit storing charge of a desired logic state in each memory cell, and comprising a read circuit that reads the logic state of each programmed individual non-volatile memory cell in comparison to an expected logic state;
- wherein, if the read logic state matches the expected logic state, the programming circuit performs an additional programming of the same logic state into the memory so as to further increase a level of charge stored by the memory cell;
- and
- wherein, if the read logic state does not match the expected logic state, the programming circuit performs a repeat programming of the same logic state into the memory.
A method for programming a non-volatile memory device comprising a matrix of non-volatile memory cells, each cell being of a floating gate type which stores charge indicative of logic state, comprising:
- programming logic states into individual memory cells of the matrix by storing charge of a desired logic state in each memory cell;
- reading the logic state of each programmed individual non-volatile memory cell;
- comparing the read logic state to an expected logic state;
- if the read logic state matches the expected logic state, then performing an additional programming of the same logic state into the memory so as to further increase a level of charge stored by the memory cell;
- and
- if the read logic state does not match the expected logic state, then performing a repeat programming of the same logic state into the memory.
Dependencies are inferred from the claim text.