Liquid crystal display and thin film transistor array panel therefor

A thin film transistor array panel comprising:

• a substrate;
• a first signal line formed on the substrate;
• a second signal line formed on the substrate and having an intersecting portion intersecting the first signal line and a curved portion connected to the intersecting portion;
• a first thin film transistor connected to the first and the second signal lines;
• a pixel electrode having first and second partitions, and are curved along the curved portion of the second signal line, wherein the first thin film transistor is connected to the first partition of the pixel electrode;
• a connection connecting the first partition and the second partition wherein the connection intersects a curved point of the curved portion of the second signal line;
• and
• a second thin film transistor connected to the second partition of the Pixel electrode;
• wherein the first and the second partitions are disposed opposite each other with respect to the second signal line and the first and the second thin film transistors are disposed opposite each other with respect to the second signal line,
• wherein the connection comprises the same layer as the gate line.

A thin film transistor array panel comprising:

• a substrate;
• a gate line formed on the substrate and including a gate electrode;
• a gate insulating layer formed on the gate line;
• a semiconductor layer formed on the gate insulating layer;
• a data line having an intersecting portion intersecting the gate line and a curved portion connected to the intersecting portion and including a source electrode formed on semiconductor layer at least in part;
• a first drain electrode formed on semiconductor layer at least in part and located opposite the source electrode;
• a passivation layer formed on the semiconductor layer;
• and
• a pixel electrode that are connected to the first drain electrode, includes first and second partitions, and has an edge adjacent to the data line and curved along the data line;
• a second drain electrode connected to the second partition of the pixel electrode, wherein the first drain electrode is connected to the first partition of the pixel electrode;
• and
• a connection connecting the first partition and the second partition;
• wherein the first and the second partitions are disposed opposite each other with respect to the data line and the first and the second drain electrodes are disposed opposite each other with respect to the data line;
• and
• wherein the connection comprises the same layer as the gate line and intersects the data line.

A liquid crystal display comprising:

• a first substrate;
• a first signal line formed on the first substrate;
• a second signal line formed on the first substrate and having an intersecting portion intersecting the first signal line and a curved portion connected to the intersecting portion;
• a thin film transistor connected to the first and the second signal lines;
• a pixel electrode that are connected to the thin film transistor and includes first and second partitions;
• a second substrate facing the first substrate;
• a common electrode formed on the second substrate;
• a liquid crystal layer interposed between the first substrate and the second substrate;
• and
• a domain defining member dividing the liquid crystal layer into a plurality of domains, each domain having two primary edges parallel to the curved portion of the second signal line;
• wherein the liquid crystal layer has negative dielectric anisotropy and is aligned substantially perpendicular to a surface of the first and the second substrates.

A liquid crystal display comprising:

• a first substrate;
• a first signal line formed on the first substrate;
• a second signal line formed on the first substrate and having an intersecting portion intersecting the first signal line and a curved portion connected to the intersecting portion;
• a thin film transistor connected to the first and the second signal lines;
• a pixel electrode that are connected to the thin film transistor and includes first and second partitions;
• a second substrate facing the first substrate;
• a common electrode formed on the second substrate;
• a liquid crystal layer interposed between the first substrate and the second substrate;
• and
• a domain defining member dividing the liquid crystal layer into a plurality of domains, each domain having two primary edges parallel to the curved portion of the second signal line;
• wherein the liquid crystal layer has positive dielectric anisotropy and is aligned substantially parallel to a surface of the first and the second substrates and twisted from the first substrate to the second substrate.