Digital-analog converter, data driver, and flat panel display device using the same

A data driver comprising:

• a shift register unit for providing sampling signals by generating a shift register clock;
• a sampling latch unit for sampling and latching digital data having a plurality of bits by receiving the sampling signals for every column line;
• a holding latch unit for simultaneously receiving and latching digital data latched in the sampling latch unit, and for converting and outputting the digital data in a serial state for every each of the bits of the digital data;
• and
• a digital-analog converter for generating gray scale voltages to correspond to bit values of the digital data supplied from the holding latch unit in a serial state through charge sharing between a plurality of data lines and a plurality of dummy data lines provided on a panel of a display device including the data driver and for providing the gray scale voltages to the data lines.

A flat panel display device comprising:

• a display region comprising a plurality of pixels connected with a plurality of scan lines arranged in a first direction, a plurality of data lines arranged in a second direction, and a plurality of dummy data lines formed adjacent to the respective data lines;
• a data driver for supplying gray scale voltages to the plurality of pixels;
• and
• a scan driver for supplying scan signals to the scan lines,
• wherein the data driver generates the gray scale voltages corresponding to the digital data input through charge sharing between the data lines and the dummy data lines and provides the gray scale voltages to corresponding ones of the pixels.

A data driving method of a flat panel display device comprising the steps of:

• serially inputting each of a plurality of bits of digital data;
• executing charge sharing between respective data lines and dummy data lines formed adjacent to the respective data lines for a plurality of periods during which each of the plurality of bits of the digital data is input;
• and
• applying a result of the charge sharing executed at a last one of the plurality of periods to corresponding ones of the pixels through the data lines as final gray scale voltages.