Variable-length decoder, video decoder and image display system having the same, and variable-length decoding method
AssigneeSamsung Electronics Co., Ltd.
InventorsJin-Feng Zhan, Jong-Seon Kim, Dong-Yul Lee, Bom-Yun Kim
Life of this patent
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Abstract
A variable-length decoder includes a bitstream interface unit and a decoding unit, The bitstream interface unit generates a decoding bitstream for a current decoding process based on an unused decoding bitstream and an input bitstream. The unused bitstream includes unused bits of a previous decoding bitstream. The decoding unit decodes the decoding bitstream to generate a plurality of symbols per clock cycle and provides a next unused bitstream for a next decoding process to the bitstream interface unit.
Claims30
A variable-length decoder comprising
- a bitstream interface unit configured to generate a decoding bitstream for a current decoding process based on an unused bitstream and an input bitstream, the unused bitstream including unused bits of a previous decoding bitstream;
- and
- a decoding unit configured to decode the decoding bitstream to generate a plurality of symbols per clock cycle, and configured to provide a next unused bitstream for a next decoding process to the bitstream interface unit.
A method of variable-length decoding comprising:
- generating a decoding bitstream for a current decoding process based on an unused bitstream and an input bitstream, the unused bitstream including unused bits of a previous decoding bitstream;
- generating a plurality of symbols per clock cycle based on the decoding bitstream;
- and
- providing a next unused bitstream for a next decoding process, the next unused bitstream including unused bits of the decoding bitstream.
A video decoder comprising:
- an inverse quantization unit configured to perform an inverse quantization operation on video data to generate a conversion coefficient;
- an inverse conversion unit configured to perform an inverse conversion operation on the conversion coefficient to generate a residual frame;
- a motion compensator configured generate a reconstructed video frame based on a reference frame and motion vectors;
- and
- a variable-length decoder configured to perform a variable-length decoding process on a bitstream to generate the video data and the motion vectors, the variable-length decoder comprising,
- a bitstream interface unit configured to generate a decoding bitstream for a current decoding process based on an unused bitstream and an input bitstream, the unused bitstream including unused bits of a previous decoding bitstream, and
- a decoding unit configured to decode the decoding bitstream to generate a plurality of symbols per clock cycle, and configured to provide a next unused bitstream for a next decoding process to the bitstream interface unit.
An image display system, comprising:
- a receiving unit configured to receive a contents program;
- a demultiplexer configured to select video data from the contents program;
- a video decoder configured to decode the video data to generate a reconstructed video frame based on a variable-length decoding algorithm, the video decoder comprising,
- a bitstream interface unit configured to generate a decoding bitstream for a current decoding process based on an unused bitstream and an input bitstream, the unused bitstream including unused bits of a previous decoding bitstream, and
- a decoding unit configured to decode the decoding bitstream to generate a plurality of symbols per clock cycle, and configured to provide a next unused bitstream for a next decoding process to the bitstream interface unit;
- an encoder configured to convert the reconstructed video frame into display data corresponding to the video frame;
- and
- a display device configured to display the display data.
Dependencies are inferred from the claim text.