Solder bump on a semiconductor substrate

A solder bump on a semiconductor substrate, comprising:

• a semiconductor substrate having a top copper pad thereon;
• a protective layer on the semiconductor substrate;
• at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad;
• a soft passivation layer with a second opening smaller than the first opening covering the inorganic passivation layer and sidewalls of the first opening;
• an under bump metal layer conformally formed along the second opening and on the soft passivation layer;
• and
• a solder bump formed on the under bump metal layer.

A solder bump on a semiconductor substrate, comprising:

• a semiconductor substrate having a top cooper pad thereon;
• a protective layer on the semiconductor substrate;
• at least one inorganic passivation layer overlying the protective layer with a first opening exposing the top copper pad;
• a soft passivation layer on the inorganic passivation layer with a second opening;
• an under bump metal layer conformally formed along the first opening and the second opening;
• and
• a solder bump formed on the under bump metal layer.