Semiconductor device with an improved solder joint

A semiconductor device comprising a first device, a second device, solder bodies, and solder joints:

• the first device including:
• a substrate having a first surface and a second surface;
• at least one semiconductor chip assembled on the first substrate surface;
• a first plurality of copper contact pads positioned to near the assembled at least one chip on the first substrate surface;
• a second plurality of copper contact pads on the second substrate surface;
• and
• a solder body attached to each pad of the second plurality of copper contact pads;
• the second device including:
• a substrate having first and second surfaces;
• at least one semiconductor chip assembled on the first substrate surface;
• copper contact pads on the second substrate surface, positioned to match the first plurality of contact pads of the first device;
• and
• a solder body attached to each pad on the second substrate surface;
• the second device aligned with the first device so that each solder body attached to a second substrate pad of the second device is in contact with, and connected to, the corresponding pad of the first plurality of the first device;
• the solder bodies being alloys including:
• tin in the amount of a first weight percent;
• silver in the amount of a second weight percent;
• and
• at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA of the Periodic Table of the Elements in the average amount of about 0.01 to about. 0.5 weight percent, wherein the solder regions near the contact pads has a third weight percent greater than zero and the center regions of the solder body has a fourth weight percent greater than the third weight percent;
• and
• the solder joint including a layer of intermetallic compounds between each copper pad and the solder body, the compounds including grains of copper and tin compounds and copper, silver, and tin compounds;
• and
• the intermetallic compounds including the transition metals.

An electronic system comprising:

• a first semiconductor device, which includes:
• a substrate having first and second surfaces;
• at least one semiconductor chip assembled on the first substrate surface;
• a first plurality of copper contact pads on the first substrate surface near the assembled at least one chip;
• a second plurality of copper contact pads on the second substrate surface;
• and
• a solder body attached to each pad of the second plurality;
• a second semiconductor device, which includes:
• a substrate having first and second surfaces;
• at least one semiconductor chip assembled on the first substrate surface;
• copper contact pads on the second substrate surface positioned to match the first pad plurality of the first device;
• and
• a solder body attached to each pad on the second substrate surface;
• the second device aligned with the first device so that each solder body attached to a pad on the second substrate surface of the second device is in contact with the corresponding pad of the first plurality of the first device;
• a circuit board having copper contact pads positioned to match the second pad plurality of the first device;
• the first device aligned with the circuit board so that each solder body attached to a second substrate pad of the first device is in contact with the corresponding pad of the board;
• the solder bodies being alloys including:
• tin in the amount of a first weight percent;
• silver in the amount of a second weight percent;
• and
• at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA of the Periodic Table of the Elements in the average amount of about 0.01 to about 0.5 weight percent, wherein the solder regions near the contact pads has a third weight percent greater than zero and the center regions of the solder body has a fourth weight percent greater than the third weight percent;
• and
• a layer of intermetallic compounds between each copper pad and the solder body, the compounds including grains of copper and tin compound and copper, silver, and tin compounds;
• the intermetallic compounds containing the transition metals.

A method for fabricating a stacked semiconductor device, comprising the steps of:

• fabricating a first semiconductor device including the steps of:
• providing a substrate having first and second surfaces, further having at least one semiconductor chip assembled on the first substrate surface;
• the substrate having a first plurality of copper contact pads in positions surrounding the assembled at least one chip on the first substrate surface, and a second plurality of copper contact pads on the second substrate surface;
• fabricating a second semiconductor device including the steps of:
• providing a substrate having first and second surfaces, further having at least one semiconductor chip assembled on the first substrate surface;
• the substrate having copper contact pads on the second substrate surface, positioned to match the first pad plurality of the first device;
• selecting solder bodies as substantially uniform alloys of:
• tin of a first weight percent;
• silver of a second weight percent;
• and
• at least one metal from the transition groups IIIA, IVA, VA, VIA, VIIA, and VIIIA of the Periodic Table of the Elements in the amount of about 0.01 to about 0.5 weight percent;
• attaching and reflowing a solder body to each pad on the second substrate surface to create a layer of intermetallic compounds between each copper pad and solder body, the compounds including grains of copper and tin compounds and copper, silver, and tin compounds;
• the compounds containing the at least one transition metal;
• aligning the second device with the first device so that each solder body is in contact with the corresponding first plurality pad of the first device;
• reflowing the solder bodies;
• attaching a alloy solder body to each second plurality pad of the first device;
• and reflowing the solder bodies.