Microelectronic devices, stacked microelectronic devices, and methods for manufacturing such devices

A set of stacked microelectronic devices, comprising:

• a first known good packaged microelectronic device including
• a first interposer substrate having a first side, a second side opposite the first side, a plurality of first interposer contacts at the first side, and a plurality of first interposer pads at the second side arranged in an array corresponding to a standard JEDEC pinout;
• a first microelectronic die attached to the first side of the interposer substrate and electrically coupled to the first interposer contacts;
• a plurality of first interconnects electrically coupled to and in contact with corresponding first interposer contacts;
• and
• a first casing that encapsulates the first die, at least a portion of the first interposer substrate, and at least a portion of the first interconnects, wherein the first casing has a first thickness and each of the first interconnects has a thickness equal to or greater than the first thickness such that at least a portion of each first interconnect is accessible at a top surface of the first casing;
• and
• a second known good packaged microelectronic device coupled to the first device in a stacked configuration, the second device including
• a second interposer substrate having a first side, a second side opposite the first side and facing the first microelectronic device, a plurality of second interposer contacts at the first side, and a plurality of second interposer pads arranged in an array at the second side, wherein the first interconnects are directly electrically coupled to corresponding second interposer pads;
• a second microelectronic die carried by the first side of the second interposer substrate and electrically coupled to corresponding second interposer contacts;
• a plurality of second interconnects electrically coupled to and in contact with corresponding second interposer contacts;
• and
• a second casing that encapsulates the second die, at least a portion of the second interposer substrate, and at least a portion of the second interconnects.

A packaged microelectronic device, comprising:

• an interposer substrate having a first side with a plurality of interposer contacts and a second side opposite the first side, the second side including a plurality of interposer pads arranged in an array corresponding to a standard JEDEC pinout;
• a microelectronic die attached and electrically coupled to the interposer substrate;
• a casing covering the die and at least a portion of the interposer substrate, wherein the casing has a first thickness and a top facing away from the interposer substrate;
• and
• a plurality of electrically conductive through-casing interconnects in contact with and projecting from corresponding interposer contacts, wherein the through-casing interconnects extend through the thickness of the casing to a terminus at the top of the casing, and wherein the through-casing interconnects are at least partially encapsulated in the casing.

A stacked microelectronic assembly, comprising:

• a first known good packaged microelectronic device including
• a support member having support member circuitry, the support member circuitry including a plurality of support member contacts;
• a microelectronic die attached the support member and electrically coupled to corresponding support member contacts;
• a casing covering the die and at least a portion of the support member, wherein the casing has a first thickness and a top facing away from the support member;
• and
• a plurality of through-casing interconnects in contact with and projecting from corresponding support member contacts, wherein the through-casing interconnects extend through the thickness of the casing to a terminus at the top of the casing, and wherein the through-casing interconnects are at least partially encapsulated in the casing;
• and
• one or more second known good packaged devices attached to the first device in a stacked configuration, the individual second devices being electrically coupled to the exposed portions of corresponding interconnects at the top of the casing.

A method for manufacturing a packaged microelectronic device, the method comprising:

• attaching a microelectronic die to a first side of a support member having support member circuitry, the support member including a second side opposite the first side and a plurality of support member pads at the second side arranged in a pattern corresponding to a standard JEDEC pinout;
• electrically coupling the die to a plurality of support member contacts at the first side of the support member;
• forming a plurality of through-casing interconnects attached to and projecting from corresponding support member contacts;
• and
• encapsulating the die, at least a portion of the support member, and at least a portion of the through-casing interconnects with a casing, wherein the through-casing interconnects have accessible terminals at a top portion of the casing.

A method for manufacturing a stacked microelectronic device assembly, the method comprising:

• assembling a plurality of microelectronic devices, each microelectronic device assembled by:
• attaching a microelectronic die to a first side of a support member having support member circuitry, the support member including a second side opposite the first side and a plurality of support member pads at the second side arranged in a pattern corresponding to a standard JEDEC pinout;
• electrically coupling the die to a plurality of support member contacts at the first side of the support member;
• forming a plurality of through-casing interconnects attached to and projecting from corresponding support member contacts;
• and
• encapsulating the die, at least a portion of the support member, and at least a portion of the through-casing interconnects with a casing, wherein the through-casing interconnects have accessible terminals at a top portion of the casing;
• testing each assembled microelectronic device;
• and
• attaching and electrically coupling the interconnects of a first one of the known good assembled microelectronic devices to the support member pads of a second one of the known good assembled microelectronic devices such that the second microelectronic device is attached to the first microelectronic device in a stacked configuration.