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US 2007/0181983 A1Published application
Semiconductor device and manufacturing method thereof
AssigneeMitsui High-Tec, Inc.
InventorsKeiji Takai, Tetsuyuki Hirashima
Life of this patent
Estimating the term…
Abstract
A method of manufacturing a semiconductor device 28 in which a plating mask 38, 39 having a noble metal plating layer 35 as an uppermost layer is formed at a predetermined portion on an obverse surface side or a reverse surface side of a leadframe material 10, and the leadframe material 10 is consecutively subjected to etching by using the plating mask 38, 39 as a resist mask, so as to form external connection terminal portions 22 which electrically communicate with a semiconductor element 18 disposed in an interior of an encapsulating resin 21, and which project downwardly. Base metal plating or noble metal plating 33 exhibiting etching solution resistance is provided as a lowermost layer of the plating mask 38, 39.
Claims15
A method of manufacturing a semiconductor device comprising the steps of:
- forming a plating mask having a noble metal plating layer as an uppermost layer at a predetermined portion on an obverse surface side or a reverse surface side of a leadframe material,
- providing base metal plating or noble metal plating exhibiting etching solution resistance as a lowermost layer of the plating mask,
- consecutively etching the leadframe material by using the plating mask as a resist mask, and
- forming external connection terminal portions which electrically communicate with a semiconductor element disposed in an interior of an encapsulating resin, and which project downwardly.
1 more element
A method of manufacturing a semiconductor device, comprising:
- a first step of forming a plating mask having a noble metal plating layer as an uppermost layer on wire bonding portions formed around a periphery of a semiconductor element portion on an obverse surface side of a leadframe material and on external connection terminal portions formed on a reverse surface side of the leadframe material in correspondence with the wire bonding portions;
- a second step of performing etching treatment of a predetermined depth on the leadframe material from the obverse surface side by using as a resist mask the plating mask formed on the obverse surface side after the formation of the etching resist film on the reverse surface side of the leadframe material, so as to cause the wire bonding portions to project;
- a third step of connecting electrode pad portions of a semiconductor element and the wire bonding portions respectively corresponding thereto by a bonding wire after the semiconductor element is mounted on the leadframe material, to thereby form electrically conductive circuits;
- a fourth step of encapsulating the obverse surface side of the leadframe material including the semiconductor element, the bonding wire, and the wire bonding portions;
- and
- a fifth step of performing etching treatment on the reverse surface side of the leadframe material with the etching resist film removed by using the formed plating mask as a resist mask, so as to cause the external connection terminal portions to project and to be made independent,
- wherein base metal plating or noble metal plating exhibiting etching solution resistance is provided as a lowermost layer of the plating mask.
4 more elements
A method of manufacturing a semiconductor device, comprising:
- a first step of forming a plating mask whose uppermost portion is constituted by a noble metal plating layer, the plating mask being formed on obverse and reverse sides of a leadframe material at positions corresponding to electrode pad portions disposed on a lower portion of a semiconductor element mounted on an obverse surface side of the leadframe material;
- a second step of performing etching treatment of a predetermined depth on the leadframe material from the obverse surface side by using as a resist mask the plating mask formed on the obverse surface side after the formation of an etching resist film on a reverse surface side of the leadframe material, so as to cause internal connection terminal portions for electrically connecting to the electrode pad portions to project;
- a third step of resin encapsulating the obverse surface side of the leadframe material including the semiconductor element after establishing electric conduction between the semiconductor element and the internal connection terminal portions on mounting the semiconductor element on the leadframe material;
- and
- a fourth step of performing etching treatment on the reverse surface side of the leadframe material with the etching resist film removed by using the formed plating mask as a resist mask, so as to cause the external connection terminal portions integrated and communicating with the internal connection terminal portions to project and to be made independent,
- wherein base metal plating or noble metal plating exhibiting etching solution resistance is provided as a lowermost layer of the plating mask.
3 more elements
A semiconductor device having external connection terminal portions which are electrically connected to an encapsulated semiconductor element and project to a reverse surface side, comprising:
- connection terminal portions which are electrically connected to electrode pad portions of the semiconductor element,
- wherein the connection terminal portions and the external connection terminal portions have their uppermost layers each constituted by a noble metal plating layer and their lowermost layers each constituted by base metal plating or noble metal plating exhibiting etching solution resistance.
A method of manufacturing a semiconductor device, comprising:
- a first step of forming a plating mask having a noble metal plating layer as an uppermost layer on internal connection terminal portions which are electrically connected to electrode pad portions of a semiconductor element mounted on an obverse surface side of a leadframe material and on external connection terminal portions formed on a reverse surface side of the leadframe material in correspondence with the internal connection terminal portions;
- a second step of performing etching treatment of a predetermined depth on the leadframe material from the obverse surface side by using as a resist mask the plating mask formed on the obverse surface side after the formation of the etching resist film on the reverse surface side of the leadframe material, so as to cause the internal connection terminal portions to project;
- a third step of electrically connecting the electrode pad portions of the semiconductor element and the internal connection terminal portions respectively corresponding thereto by a bonding wire after the semiconductor element is mounted on the leadframe material;
- a fourth step of encapsulating the obverse surface side of the leadframe material including the semiconductor element and the internal connection terminal portions;
- and
- a fifth step of performing etching treatment on the reverse surface side of the leadframe material with the etching resist film removed by using the formed plating mask as a resist mask, so as to cause the external connection terminal portions to project and to separate and make independent conductor terminals having the external connection terminal portions on an outer side and the internal connection terminal portions on an inner side,
- wherein a step of deburring and cleaning the plating is provided after the etching treatment in the second step and the fifth step, for removing plating burrs generated around a periphery of each of the internal connection terminal portions and the external connection terminal portions.
4 more elements
Dependencies are inferred from the claim text.