Band gap circuit
AssigneeSeiko Instruments Inc.
InventorOsamu Uehara
Life of this patent
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Abstract
Provided is a band gap constant-voltage circuit which is configured by combining a PMOS transistor, an NMOS transistor, a bipolar transistor, and a resistor, and is capable of preventing an output voltage from being stabilized at 0 V immediately after power supply fluctuation. According to the band gap constant-voltage circuit of the present invention, the back-gates of two p-type transistors (P112 and P113) constituting a differential amplifier are each connected to a node 11 which is a power source terminal on the positive side of the differential amplifier, and a level shifter circuit is connected to the gate of each of the transistors (P112 and P113).
Claims4
A band gap circuit having a differential amplifier circuit, comprising:
- a pair of PMOS transistors;
- and
- a level shifter circuit, wherein:
- the pair of PMOS transistors are connected to each other through source terminals thereof;
- the level shifter circuit is connected to a gate of each of the pair of PMOS transistors, the gate being used as an input terminal;
- and
- the pair of PMOS transistors each have a back-gate connected to each of the source terminals.
Dependencies are inferred from the claim text.