Semiconductor device having a vertical channel and method of manufacturing same

A semiconductor device having a vertical channel, comprising:

• a semiconductor substrate;
• a plurality of active pillars extended in a direction perpendicular to a main surface of the semiconductor substrate, said active pillars spaced apart by a predetermined distance in a corresponding row direction and a column direction;
• a ring-shaped gate electrode formed on a predetermined portion of a sidewall of said active pillar such that said ring-shaped gate electrode surrounds said active pillar;
• a top source/drain region formed on the active pillar disposed over said gate electrode;
• a bottom source/drain region formed under the active pillar of the ring-shaped gate electrode, wherein said bottom and top source/drain regions define a channel;
• a word line connecting said ring-shaped gate electrodes associated with said active pillars and disposed in the same column or row;
• and
• a bit line electrically connected to said bottom source/drain region, said bit line extending in a direction perpendicular to said word line,
• said ring-shaped gate electrode and said word line are integrally formed without an interface therebetween.

A method of manufacturing a semiconductor device having a vertical channel, the method comprising:

• providing a semiconductor substrate having a plurality of active pillars spaced apart by a predetermined distance in row and column directions;
• forming an isotropic space on a predetermined portion of a sidewall of the active pillar;
• forming a planarized conductive material layer such that it fills the isotropic space and a space between the active pillars;
• forming a word line mask pattern on the planarized conductive material layer and a predetermined portion of the active pillar;
• and
• forming a ring-shaped gate electrode in the isotropic space and simultaneously forming a word line by etching the planarized conductive material layer using the word line mask pattern.

A method of manufacturing a semiconductor device having a vertical channel, the method comprising:

• forming a plurality of pillars equally spaced apart and arranged in row and column directions on a semiconductor substrate;
• separating the pillars disposed in the respective rows from each other to form active pillars;
• filling an interlayer insulating layer into a space between the active pillars;
• etching the interlayer insulating layer to a predetermined thickness exposing the plurality of active pillars disposed in the same column;
• isotropically etching a sidewall of the exposed active pillar to form an isotropic space;
• forming a gate insulating layer on a surface of the active pillar where the isotropic space is formed;
• forming a conductive material by damascene process such that the conductive material fills the isotropic space of the active pillar and the space between the interlayer insulating layer and the active pillar;
• and
• etching back the conductive material to a predetermined thickness to form a ring-shaped gate electrode and simultaneously forming a word line which is integrally formed with the ring-shaped gate electrode to connect the ring-shaped gate electrodes of the active pillars disposed in the same row.