Passive impedance equalization of high speed serial links

A device comprising

• a circuit board;
• at least two integrated circuits mounted on the circuit board;
• a serial link between the at least two integrated circuits, wherein the serial link includes one or more package traces connecting integrated circuit die to the circuit board and one or more board traces connecting the at least two integrated circuits, and wherein the serial link may include impedance discontinuities;
• and
• at least one stepped impedance transformer formed in the serial link

A device comprising

• a first circuit board;
• a second circuit board;
• an interface connector to connect the first circuit board and the second circuit board;
• and
• at least one stepped impedance transformer formed on at least some subset of the first circuit board and the second circuit board, wherein the at least one stepped impedance transformer alleviates impedance mismatches caused by non-ideal nature of the interface connector.

A system comprising

• a mother board;
• a daughter card coupled at a right angle to the mother board using an interface connector;
• and
• at least one stepped impedance transformer formed in traces leading to the interface connector on at least some subset of the mother board and the daughter card, wherein the at least one stepped impedance transformer alleviates impedance mismatches caused by non-ideal nature of the interface connector.