Multi-step process for forming a barrier film for use in copper layer formation
AssigneeLSI Logic Corporation
InventorsWilbur Catabay, Zhihai Wang, Ping Li
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AssigneeLSI Logic Corporation
InventorsWilbur Catabay, Zhihai Wang, Ping Li
Estimating the term…
Embodiments of the invention include a method for forming a copper interconnect having a bi-layer copper barrier layer. The method comprises the steps of providing a substrate in a processing chamber, the substrate having a low-K dielectric insulating layer and an opening in the insulating layer. A first barrier layer of tantalum/tantalum nitride is formed on the insulating layer and in the opening. A second barrier layer is formed on the first barrier layer. The second barrier layer consisting of a material selected from the group of palladium, chromium, tantalum, magnesium, and molybdenum. A copper seed layer is formed on the second barrier layer and a bulk copper layer is formed on the seed layer. The substrate is annealed and subject to further processing which can include planarization. Other embodiments include providing a substrate in a processing chamber and forming a copper seed layer on the substrate. The seed layer is implanted with barrier materials to form an implanted seed layer followed by bulk copper-containing layer formation. The substrate is annealed to form a final barrier layer. In a related embodiment the step of forming a seed layer is replaced with the steps of forming a first barrier layer on the substrate and forming a copper seed layer on the first barrier layer. After implantation of barrier material into the seed layer and bulk deposition of copper-containing material, the substrate is annealed to form a final barrier layer. In yet another related embodiment the step of forming a seed layer is replaced with the steps of forming a first barrier layer on the substrate and forming a second barrier layer on the first layer. A copper seed layer is formed on the second barrier layer. After implantation of barrier material into the seed layer and bulk deposition of copper-containing material, the substrate is annealed to form a final barrier layer.
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A method for forming a copper interconnect having a robust copper barrier layer, the method comprising:
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A semiconductor interconnect structure comprising:
Dependencies are inferred from the claim text.