Double-gated non-volatile memory and methods for forming thereof

A method of forming a transistor, comprising:

• providing a wafer comprising a semiconductor layer, a first storage layer, and a first layer of gate material, wherein the first storage layer is located between the semiconductor layer and the first layer of gate material;
• forming a second storage layer over the semiconductor layer;
• forming a second layer of gate material over the second layer of nanocrystals;
• patterning the semiconductor layer to leave a first portion of the semiconductor layer to function as a channel of the transistor;
• and
• after the patterning the semiconductor layer, patterning the first layer of gate material to leave a first portion of the first layer of gate material wherein the first portion is covered by the first portion of the semiconductor layer and functions as a bottom gate of the transistor.

A method, comprising:

• providing a first device structure comprising a first semiconductor layer, a first insulating layer on the first semiconductor layer, a first layer of gate material on the first insulating layer, a first storage layer on the first layer of gate material, and a second semiconductor layer on the first storage layer;
• forming a second storage layer on the second semiconductor layer;
• forming a second layer of gate material on the second storage layer;
• patterning the second layer of gate material to leave a top gate;
• implanting the second semiconductor layer using the top gate as a mask to form source and drain regions in the second semiconductor layer;
• forming a first sidewall spacer on sides of the top gate;
• and
• etching through portions of the source and drain regions, through portions of the first storage layer;
• and through portions of the first layer of gate material and laterally etching a portion of the first layer of gate material, wherein the etching through portions of the first layer of gate material to remove portions of the first layer of gate material from under the first sidewall spacer leaves a bottom gate.