Semiconductor device and fabrication method thereof
AssigneeSharp Kabushiki Kaisha
InventorsToshihisa Gotoh, Kenichi Azuma, Kouichi Takeuchi, Akiyoshi Mutoh
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Abstract
A semiconductor device includes a first insulating layer and a second insulating layer in a trench. The first insulating layer insulates two MOSFETs from each other, and the second insulating layer has a true stress opposite to a true stress of the first insulating layer. The second insulating layer includes two regions of different true stresses. This enables a drain current flow in each MOSFET to be independently controlled in a semiconductor device that employs a STI method for element isolation.
Claims27
A semiconductor device comprising:
- a semiconductor substrate;
- a trench formed on the semiconductor substrate;
- at least two MOSFETs provided on the semiconductor substrate with the trench in between;
- a first insulating layer, provided in the trench, insulating the MOSFETs;
- and a second insulating layer, provided at least between the first insulating layer and the MOSFETs, having a true stress opposite to a true stress of the first insulating layer,
- the true stress of the second insulating layer being different in (i) a region formed between one MOSFET and the first insulating layer and (ii) a region formed between another MOSFET and the first insulating layer.
A semiconductor device comprising:
- a semiconductor substrate;
- a trench formed on the semiconductor substrate;
- at least two MOSFETs provided on the semiconductor substrate with the trench in between;
- a first insulating layer, provided in the trench, insulating the MOSFETs;
- and a second insulating layer, provided at least between the first insulating layer and the MOSFETs, having a true stress opposite to a true stress of the first insulating layer,
- the true stress of the second insulating layer being different in (i) a region formed between one MOSFET and the first insulating layer and (ii) a region formed between another MOSFET, disposed on an opposite side of the trench, and the first insulating layer.
A semiconductor device comprising:
- a semiconductor substrate;
- a trench formed on the semiconductor substrate;
- at least two MOSFETs provided on the semiconductor substrate with the trench in between;
- a first insulating layer, provided in the trench, insulating the MOSFETs;
- and a second insulating layer, provided at least between the first insulating layer and the MOSFETs, having a true stress opposite to a true stress of the first insulating layer,
- said at least two MOSFETs including a P-channel MOSFET and an N-channel MOSFET, and the true stress of the second insulating layer being different in (i) a region formed between the N-channel MOSFET and the first insulating layer and (ii) a region formed between the P-channel MOSFET and the first insulating layer.
A semiconductor device in which at least a trench, an N-channel MOSFET, and a P-channel MOSFET disposed opposite the N-channel MOSFET with the trench in between are formed on a semiconductor substrate,
- said semiconductor device comprising:
- a first insulating layer, provided in the trench, for insulating the N-channel MOSFET and the P-channel MOSFET from each other and having a compressive stress;
- and
- a second insulating layer, provided at least between the first insulating layer and the N-channel MOSFET, and between the first insulating layer and the P-channel MOSFET, having a tensile stress,
- the tensile stress of the second insulating layer being smaller in a region formed between the first insulating layer and the P-channel MOSFET than in a region formed between the first insulating layer and the N-channel MOSFET.
A semiconductor device in which at least a trench, an N-channel MOSFET, and a P-channel MOSFET disposed opposite the N-channel MOSFET with the trench in between are formed on a semiconductor substrate,
- said semiconductor device comprising:
- a first insulating layer, provided in the trench, for insulating the N-channel MOSFET and the P-channel MOSFET from each other and having a tensile stress;
- and
- a second insulating layer, provided at least between the first insulating layer and the N-channel MOSFET, and between the first insulating layer and the P-channel MOSFET, having a compressive stress,
- the compressive stress of the second insulating layer being greater in a region formed between the first insulating layer and the P-channel MOSFET than in a region formed between the first insulating layer and the N-channel MOSFET.
A method for fabricating a semiconductor device in which a trench and at least two MOSFETs provided on both sides of the trench are formed on a semiconductor substrate,
- the method comprising the steps of:
- forming, in the trench, a first insulating layer having a true stress in a certain direction;
- forming, between the first insulating layer and inner walls of the trench, a second insulating layer having a true stress opposite the true stress of the first insulating layer,
- said step of forming a second insulating layer including a step of placing an insulating layer in the trench, and a step of varying a true stress in a portion of the insulating layer by a chemical reaction process.
Dependencies are inferred from the claim text.