Semiconductor memory, memory controller and control method for semiconductor memory
AssigneeFujitsu Limited
InventorsSatoshi Eto, Kuninori Kawabata, Toshiya Miyo, Yuji Serizawa
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Abstract
Semiconductor memory for inputting and outputting data synchronously with a clock, comprising: a clock reception unit for receiving the clock; and a command reception unit for initially receiving a first specific command synchronizing with the clock after turning a power on, after a low-power standby or after an initialization, followed by starting a command reception.
Claims20
Semiconductor memory for inputting and outputting data synchronously with a clock, comprising:
- a clock reception unit for receiving the clock;
- and
- a command reception unit for initially receiving a first specific command synchronizing with the clock after turning a power on, after a low-power standby or after an initialization, followed by starting a command reception.
A memory controller connected to semiconductor memory for inputting and outputting data synchronously with a clock, comprising:
- a clock reception unit for receiving the clock;
- and
- a command reception unit for initially receiving a first specific command synchronizing with the clock after turning a power on, after a low-power standby or after an initialization, followed by starting a command reception.
A control method used for semiconductor memory for inputting and outputting data synchronously with a clock, comprising the steps of
- receiving the clock;
- and
- initially receiving a first specific command synchronizing with the clock after turning a power on, after a low-power standby or after an initialization, followed by starting a command reception.
Dependencies are inferred from the claim text.