Nonvolatile semiconductor memory and nonvolatile memory system using thereof
AssigneeKabushiki Kaisha Toshiba
InventorsHiroyuki Nagashima, Yasuyuki Fukuda
Life of this patent
Estimating the term…
Abstract
A nonvolatile semiconductor memory that have a a plurality of bit lines and word lines disposed crossing each other; a memory cell array having a plurality of electrically-programmable memory cells disposed in a region where the bit lines and the word lines are crossing; a trimming circuit which is operated a parameter of initial program voltage every the word line; an initial programming voltage parameter memory section which is stored receiving the parameter of initial program voltage from the trimming circuit; and a controller which is data program for the memory cell array based on the parameter of initial program voltage stored in the initial programming voltage parameter memory section.
Claims20
A nonvolatile semiconductor memory comprising:
- a plurality of bit lines and word lines disposed crossing each other;
- a memory cell array having a plurality of electrically-programmable memory cells disposed in a region where the bit lines and the word lines are crossing;
- a trimming circuit which is operated a parameter of initial program voltage every the word line;
- an initial programming voltage parameter memory section which is stored receiving the parameter of initial program voltage from the trimming circuit;
- and
- a controller which is data program for the memory cell array based on the parameter of initial program voltage stored in the initial programming voltage parameter memory section.
The nonvolatile semiconductor memory comprising:
- a plurality of bit lines and word lines disposed crossing each other;
- a memory cell array having a plurality of electrically-programmable memory cells disposed in a region where the bit lines and the word lines is crossed;
- a trimming circuit as well as the same number of that of the word line, which is operated a parameter of initial program voltage every the word line;
- an initial programming voltage parameter memory section which is stored receiving the parameter of the initial program voltage from the plurality of the trimming circuits;
- and
- a controller which is data program for the memory cell array based on a parameter of the initial program voltage stored in the initial programming voltage parameter memory section.
Dependencies are inferred from the claim text.