Data transmission method, data transmission circuit, output circuit, input circuit, semiconductor device, and electronic device
AssigneePioneer Corporation
InventorToshiaki Inoue
Life of this patent
Estimating the term…
Abstract
A data transfer circuit comprises a voltage/current converter circuit for converting a first binary voltage data of n bits (n is an integer equal to or larger than two) to multi-value current data of 2n values which is output to a single data transfer line. A current comparator circuit converts the multi-value current data on the data transfer line to binary current data of (2n−1) bits, and a current/voltage converter circuit converts the binary current data of the (2n−1) bits to second binary voltage data of (2n−1) bits. A counter circuit restores the first binary voltage data of the n bits from the second binary voltage data of the (2n−1) bits.
Claims30
A data transfer method for a digital image processing apparatus, comprising the steps of:
- converting first binary voltage data of n-bit (n is an integer equal to or larger than two) to multi-value current data of 2n values;
- transferring the multi-value current data through a single data line;
- converting the multi-value current data on the data line to binary current data of (2n−1) bits;
- converting the binary current data of the (2n−1) bits to second binary voltage data of (2n−1) bits;
- and
- restoring the first binary voltage data of the n bits from the second binary voltage data of the (2n−1) bits.
A data transfer circuit for a digital image processing apparatus, comprising:
- a voltage/current converter circuit for converting first binary voltage data of n-bit (n is an integer equal to or larger than two) to multi-value current data of 2n values;
- a single data transfer line for transferring the multi-value current;
- a current comparator circuit for converting the multi-value current data on the data line to binary current data of (2n−1) bits;
- a current/voltage converter circuit for converting the binary current data of the (2n−1) bits to second binary voltage data of (2n−1) bits;
- and
- a counter circuit for restoring the first binary voltage data of the n bits from the second binary voltage data of the (2n−1) bits.
An output circuit comprising:
- an input unit for receiving binary voltage data Xi (i is an integer equal to or larger than zero and equal to or smaller than n−1) of n bits (n is an integer equal to or larger than two);
- and
- a group of current mirror circuits for outputting current values proportional to 2i,
- wherein the output currents of said group of current mirror circuits are multiplexed to generate a current value proportional to Σ2iXi in accordance with the binary voltage data Xi.
An output circuit comprising:
- an input unit for receiving binary voltage data Xi (i is an integer equal to or larger than zero and equal to or smaller than n−1) of n bits (n is an integer equal to or larger than two);
- a first transistor provided for each bit of the n bits of the binary voltage data Xi, and having a source terminal connected to a power supply terminal or a ground terminal, and a gate terminal and a drain terminal connected to each other;
- a second transistor provided for said each bit, applied with the binary voltage data X1 at a gate terminal, and having a drain terminal connected to the drain terminal of said first transistor;
- a third transistor provided for said each bit, and having a source terminal connected to the power supply terminal or the ground terminal, a gate terminal connected to the gate terminal of said first transistor, and a drain terminal connected to a multi-value current data output line;
- and
- a constant current source provided for said each bit, and connected between the source terminal of said second transistor and the ground terminal or the power supply terminal,
- wherein said output circuit outputs multi-value current data having a current value proportional to Σ2iXi to said multi-value current data output line in accordance with the binary voltage data Xi.
An output circuit comprising:
- sets of first transistors to third transistors arranged in parallel, corresponding respectively to n bits (n is an integer equal to or larger than two) of binary voltage data Xi (i is an integer equal to or larger than zero and equal to or smaller than n−1) of the n bits supplied from the outside,
- wherein said first transistor and said third transistor have source terminals connected to a common power supply terminal or a common ground terminal, said second transistor has a source terminal connected to a common regulated current, said third transistor has a drain connected to a common multi-value current data line, and a current value proportional to Σ2iXi in accordance with the binary voltage data Xi is output to the common multi-value current data output line.
An input circuit comprising:
- a current comparator circuit;
- and
- a current/voltage converter circuit,
- wherein said current comparator circuit comprises:
- an input unit for receiving single multi-value current data of 2n values (n is an integer equal to or larger than 2);
- (2n−1) independent current mirror circuits, said multi-value current data being expanded to said (2n−1) current mirror circuits;
- and
- (2n−1) threshold current sources for supplying threshold currents corresponding to the 2n value of the multi-value current data to said (2n−1) current mirror circuits, respectively, and
- binary voltage data of a corresponding bit of (2n−1) bits is output based on current driving capabilities of each of said (2n−1) current mirror circuits and the threshold current from a corresponding one of said (2n−1) threshold current sources, and
- said current/voltage converter circuit converts the binary current data of the (2n−1) bits to binary voltage data of the (2n−1) bits.
An input circuit comprising:
- a current comparator circuit;
- and
- a current/voltage converter circuit,
- wherein said current comparator circuit comprises:
- (2n−1) sets of a fifth transistor arranged in parallel to a single multi-value current data input of 2n values (n is an integer equal to or larger than two) supplied from the outside, and a threshold current source for outputting a threshold current used to discriminate the multi-value current data,
- said current comparator circuit has said fifth transistor having a source terminal connected to a common ground terminal or a common power supply terminal, and said threshold current source connected to a common power supply terminal or a common ground terminal, and outputs binary current data of (2n−1) bits based on the multi-value current data and the threshold current from said threshold current source, and
- said current/voltage converter circuit converts the binary current data of the (2n−1) bits to binary voltage data of the (2n−1) bits.
Dependencies are inferred from the claim text.