Analog-to-digital Converter Using Lookahead Pipelined Architecture and Open-loop Residue Amplifiers
AssigneeClariPhy Communications, Inc.
InventorCarl Grace
Life of this patent
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Abstract
A lookahead pipelined ADC architecture uses open-loop residue amplifiers with calibration. This approach is able to achieve a high-speed, high-accuracy ADC with reduced power consumption. In one aspect, an ADC pipeline unit includes a plurality of lookahead pipeline stages (i.e., an ADC lookahead pipeline) coupled to a calibration unit. The ADC lookahead pipeline uses open-loop residue amplifiers. The calibration unit compensates for non-linearity in the open-loop amplifiers.
Claims33
An ADC pipeline unit for converting input analog values to N-bit digital representations, the ADC pipeline unit comprising:
- a plurality of lookahead pipeline stages that generate a total of M raw bits, with M>N, the stages including open-loop residue amplifiers;
- and
- a calibration unit coupled to the lookahead pipeline stages to compensate for non-linearity in the open-loop residue amplifiers.
An interleaved analog-to-digital converter (ADC) for converting an input stream of analog values to an output stream of N-bit digital representations, the ADC comprising:
- an analog demultiplexer for receiving an input stream of analog values and demultiplexing the input stream into K analog channels;
- K ADC channels coupled to the analog demultiplexer, each ADC channel for converting one of the analog channels to a digital channel of corresponding N-bit digital representations;
- and
- a digital multiplexer coupled to the K ADC channels for multiplexing the digital channels into the output stream of N-bit digital representations.
Dependencies are inferred from the claim text.