Semiconductor device including a high voltage device

A semiconductor device comprising:

• a semiconductor substrate;
• a high voltage device formed on the semiconductor substrate;
• a first interlayer dielectric formed over the high voltage device;
• a metal interconnection including at least a PCM pad penetrating through the first interlayer dielectric and being electrically connected to the high voltage device for a PCM measurement;
• and
• a passivation layer formed on at least one of the PCM pad and a PCM test pad and configured to protect the at least one PCM test pad and PCM pad without protecting at least one portion of the metal interconnection.

A method comprising:

• forming an isolation layer over a semiconductor substrate, wherein at least a high voltage area is defined in the semiconductor substrate;
• forming a first interlayer dielectric over the semiconductor substrate;
• forming a contact hole in the first interlayer dielectric to expose a source region, a drain region, and a gate electrode formed under the first interlayer dielectric in the high voltage area;
• forming a metal interconnection in the contact hole, including at least a PCM pad;
• and
• forming a passivation layer configured to protect at least one of a PCM test pad and the PCM pad.