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US 2007/0176280 A1Published application
Waferscale package system
AssigneeSTATS ChipPAC, Ltd.
InventorsByung Tai Do, Sung Uk Yang
Life of this patent
Estimating the term…
Abstract
A waferscale package system is provided forming a protection structure comprises forming a wafer, fabricating a device element on the wafer, forming a waferscale spacer around the device element, and attaching a waferscale cap to the waferscale spacer to cover the device element, attaching a carrier to the protection structure, and molding an encapsulant around the protection structure to the carrier.
Claims20
A waferscale package system comprising:
- forming a protection structure comprises:
- forming a wafer,
- fabricating a device element on the wafer,
- forming a waferscale spacer around the device element, and
- attaching a waferscale cap to the waferscale spacer to cover the device element;
- attaching a carrier to the protection structure;
- and
- molding an encapsulant around the protection structure to the carrier.
5 more elements
A waferscale package system comprising:
- forming a protection structure comprises:
- forming a wafer,
- fabricating a device element on the wafer,
- forming a waferscale spacer around the device element,
- attaching a waferscale cap to the waferscale spacer to cover the device element, and
- singulating the wafer to form a number of a semiconductor die;
- attaching a carrier to the protection structure;
- and
- molding an encapsulant around the protection structure to the carrier.
6 more elements
A waferscale package system comprising:
- a protection structure comprises:
- a semiconductor die,
- a device element on the semiconductor die,
- a waferscale spacer around the device element, and
- a waferscale cap attached to the waferscale spacer to cover the device element;
- a carrier attached to the protection structure;
- and
- an encapsulant around the protection structure to the carrier.
5 more elements
Dependencies are inferred from the claim text.