Nwell to nwell isolation
AssigneeTexas Instruments Incorporation
InventorsShaoping Tang, Zhiqiang Wu
Life of this patent
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Abstract
Multiple blanket implantations of one or more p type dopants into a semiconductor substrate are performed to facilitate isolation between nwell regions subsequently formed in the substrate. The blanket implantations are performed through isolation regions in the substrate so that the p type dopants are implanted to depths sufficient to separate the nwell regions. This increased concentration of p type dopants helps to mitigate leakage between the nwell regions as the nwell regions are brought closer together to increase packing densities.
Claims20
A method of preparing a semiconductor substrate utilized to produce a CMOS chip whereon RF functions are integrated for system on chip applications, comprising:
- providing a semiconductor substrate having a resistivity of between about 20 ohms and about 60 ohms;
- forming an isolation region within the semiconductor substrate;
- performing a first blanket implant of p type dopant atoms into the substrate such that the p type dopant atoms are implanted under the isolation region to have a peak of a first depth that is less than a depth of the junction of subsequently formed nwell regions to mitigate leakage between at least some of the subsequently formed nwell regions;
- performing a second blanket implant of p type dopant atoms into the substrate such that the p type dopant atoms are implanted under the isolation region to have a peak of a second depth that is greater than the depth of the junction of the subsequently formed nwell regions to mitigate leakage between at least some of the subsequently formed nwell regions;
- and
- performing a third implant of n type dopant atoms to form first and second nwell regions within the substrate on opposing sides of the isolation region.
A semiconductor substrate conditioned for a CMOS chip whereon RF functions are integrated for system on chip applications, comprising:
- a substantially uniform doping of a p type dopant to instill a resistivity of between about 20 ohms and about 60 ohms in the substrate;
- an isolation region formed within the substrate;
- a first nwell region formed to a first side of the isolation region;
- a second nwell region formed to a second side of the isolation region;
- a first region under the isolation region and between the first and second nwell regions that has a concentration of p type dopants greater than that of the substrate;
- and
- a second region under the first region and between the first and second nwell regions that has a concentration of p type dopants greater than that of the substrate but less than that of the first region, where the first and second p type regions mitigate leakage between the first and second nwell regions.
A semiconductor substrate conditioned for a CMOS chip whereon RF functions are integrated for system on chip applications, comprising:
- a substantially uniform doping of p type dopant atoms to instill a resistivity of between about 20 ohms and about 60 ohms in the substrate;
- first and second nwell regions formed on opposing sides of an isolation region formed within the substrate;
- a first region of p type dopant atoms under the isolation region, the first region of p type dopant atoms being shallower than the first and second nwell regions and having a concentration of p type dopant atoms that is greater than that of the substrate;
- and
- a second region of p type dopant atoms under the first region of p type dopant atoms, the second region of p type dopant atoms being deeper than the first and second nwell regions and having a concentration of p type dopant atoms that is greater than that of the substrate but less than that of the first region of p type dopant atoms.
Dependencies are inferred from the claim text.