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US 2007/0176252 A1Published application
Lateral silicided diodes
AssigneeInternatioanl Business Machines Corporation
InventorsDouglas Duane Coolbaugh, Jeffrey Bowman Johnson, Xuefeng Liu, Bradley Alan Orner, Robert Mark Rassel, David Charles Sheridan
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Abstract
A structure and method of fabricating lateral diodes. The diodes include Schottky diodes and PIN diodes. The method of fabrication includes forming one or more doped regions and more trenches in a silicon substrate and forming metal silicides on the sidewalls of the trenches. The fabrication of lateral diodes may be integrated with the fabrication of field effect, bipolar and SiGe bipolar transistors.
Claims34
A diode, comprising:
- a doped region having opposite first and second sides, said doped region extending from a top surface of a silicon substrate a first distance into said substrate;
- a trench having opposite first and second sidewalls and extending from said top surface of said substrate a second distance into said substrate, said first sidewall of said trench of separated from said first sidewall of said doped region by a dielectric region extending from said top surface of said substrate a third distance into said substrate and by a region of said substrate under said dielectric region and between said first side of said doped region and said first sidewall of said trench, said third distance less than said first or second distances;
- and
- a first region of a metal silicide layer on said first sidewall of said trench and a second region of said metal silicide layer on a top surface of said doped region, said first and second regions of said metal silicide layer electrically isolated from each other by said dielectric region.
1 more element
A method of fabricating a diode, comprising:
- forming doped region in a silicon substrate, said doped region having opposite first and second sides, said doped region extending from a top surface of said substrate a first distance into said substrate;
- forming a trench in said substrate, said trench having opposite first and second sidewalls and extending from said top surface of said substrate a second distance into said substrate, said first sidewall of said trench separated from said first side of said doped region by a dielectric region extending from said top surface of said substrate a third distance into said substrate and by a region of said substrate under said dielectric region and between said first side of said doped region and said first sidewall of said trench, said third distance less than said first or second distances;
- and
- forming a first region of a metal silicide layer on said first sidewall of said trench and forming a second region of said metal silicide layer on a top surface of said doped region, said first and second regions of said metal silicide layer electrically isolated from each other by said dielectric region.
1 more element
A diode, comprising:
- a first doped region having opposite first and second sides, said first doped region extending from a top surface of a silicon substrate a first distance into said substrate;
- a second doped region having opposite first and second sides, said second doped region extending from said top surface of a silicon substrate a second distance into said substrate, said first and second doped regions separated by a dielectric region extending from said top surface of said substrate a third distance into said substrate and by a region of said substrate under said dielectric layer and between said first sides of said first and second doped regions, said first side of said first doped region opposite said first side of said second doped region, said third distance less than said first or second distances;
- a first trench having opposite first and second sidewalls and extending from said top surface of said substrate a fourth distance into said substrate, said first sidewall of said first trench abutting said second side of said first doped region;
- a second trench having opposite first and second sidewalls and extending from said top surface of said substrate said fourth distance into said substrate, said first sidewall of said second trench abutting said second side of said second doped region;
- and
- a first region of a metal silicide layer on a top surface of said first doped region and on said second side of said first doped region and a second region of said metal silicide layer on a top surface of said second doped region and on said second side of said second doped region, said first and second regions of said metal silicide layer electrically isolated from each other by said dielectric region.
3 more elements
A method of fabricating a diode, comprising:
- forming a first doped region in a silicon substrate, said first doped region having opposite first and second sides, said first doped region extending from a top surface of said substrate a first distance into said substrate;
- forming a second doped region in said substrate, said second doped region having opposite first and second sides, said second doped region extending from said top surface of a silicon substrate a second distance into said substrate, said first and second doped regions separated by a dielectric region extending from said top surface of said substrate a third distance into said substrate and by a region of said substrate under said dielectric layer and between said first sides of said first and second doped regions, said first side of said first doped region opposite said first side of said second doped region, said third distance less than said first or second distances;
- forming a first trench in said substrate, said first trench having opposite first and second sidewalls and extending from said top surface of said substrate a fourth distance into said substrate, said first sidewall of said first trench abutting said second side of said first doped region;
- forming a second trench in said substrate, said second trench having opposite first and second sidewalls and extending from said top surface of said substrate said fourth distance into said substrate, said first sidewall of said second trench abutting said second side of said second doped region;
- and
- forming a first region of a metal silicide layer on a top surface of said first doped region and on said second side of said first doped region and forming a second region of said metal silicide layer on a top surface of said second doped region and on said second side of said second doped region, said first and second regions of said metal silicide layer electrically isolated from each other by said dielectric region.
3 more elements
Dependencies are inferred from the claim text.