MOS device with multi-layer gate stack
AssigneeFressscale Semiconductor, Inc.
InventorsChun-Li Liu, Marius Orlowski, Matthew Stoker
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AssigneeFressscale Semiconductor, Inc.
InventorsChun-Li Liu, Marius Orlowski, Matthew Stoker
Estimating the term…
Methods and apparatus are provided for semiconductor devices. The apparatus comprises a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate, and a multilayered gate structure located above the channel region. The gate structure comprises, a gate dielectric, preferably of an oxide of Hf, Zr or HfZr substantially in contact with the channel region, a first conductor layer of, for example an oxide of MoSi overlying the gate dielectric, a second conductor layer of, e.g., poly-Si, overlying the first conductor layer and adapted to apply an electrical field to the channel region, and an impurity migration inhibiting layer (e.g., MoSi) located above or below the first conductor layer and adapted to inhibit migration of a mobile impurity, such as oxygen for example, toward the substrate.
A semiconductor device, comprising:
A semiconductor device, comprising:
A method for forming a semiconductor device with a multi-layered gate structure resistant to migration of a mobile species and overlying a channel region of the device, comprising:
Dependencies are inferred from the claim text.