MOS device with nano-crystal gate structure

A semiconductor device, comprising:

• a substrate having therein a source region and a drain region separated by a channel region extending to a first surface of the substrate;
• a multilayered gate structure located above the channel region, wherein the gate structure comprises:
• a first dielectric in substantial contact with the channel region;
• a second dielectric of composition substantially the same or different than the first dielectric, disposed on the first dielectric;
• spaced-apart nano-crystals located substantially where the first dielectric and the second dielectric join and covered by the second dielectric;
• a gate conductor above the second dielectric, wherein the gate conductor is a source of a mobile impurity;
• and
• at least one blocking layer disposed between the second dielectric and the gate conductor, and adapted to inhibit motion of the mobile impurity into the second dielectric.

A method for forming a semiconductor device with a nano-crystal gate structure resistant to migration of a mobile species, comprising:

• providing a semiconductor substrate having an upper surface;
• creating on the upper surface a gate dielectric having therein a layer of spaced-apart nano-crystals of a material adapted to reversibly receive and store charge;
• forming one or more impurity blocking layers over the gate dielectric;
• forming a gate conductor layer over the one or more impurity blocking layers;
• etching out a gate stack comprising portions of the gate dielectric, the nano-crystals, the one or more impurity blocking layers and the gate conductor layer;
• and
• providing spaced-apart source-drain regions laterally disposed on either side of the gate stack.