Semiconductor device

A semiconductor device comprising a memory cell, constituted by a field-effect transistor, the field-effect transistor including:

• a first gate electrode formed on a semiconductor substrate of a first electric conduction type through a first gate dielectric film;
• a second gate electrode formed on the first gate electrode through a second gate dielectric film;
• and
• a diffusion layer of a second electric conduction type formed on the semiconductor substrate,
• wherein the second gate electrode constitutes a word line,
• the diffusion layer constitutes a data line, and
• a first electrode is formed on the data line constituted by the diffusion layer through a dielectric film.

A semiconductor device including a memory cell, constituted by a field-effect transistor, the field-effect transistor comprising:

• a first gate electrode formed on a semiconductor substrate of a first electric conduction type through a first gate dielectric film;
• a second gate electrode formed on the first gate electrode through a second gate dielectric film;
• a third gate electrode formed on the semiconductor substrate through a third gate dielectric film;
• and
• a diffusion layer of a second electric conduction type formed on the semiconductor substrate,
• wherein the first gate electrode and the third gate electrode are not present on a same plane,
• the second gate electrode constitutes a word line, the diffusion layer constitutes a data line, and
• a first electrode is formed on the data line constituted by the diffusion layer through a dielectric film.

A semiconductor device comprising a plurality of memory cells each constituted by a field-effect transistor, the field-effect transistor including:

• a first gate electrode formed on a semiconductor substrate of a first electric conduction type through a first gate dielectric film;
• a second gate electrode formed on the first gate electrode through a second gate dielectric film;
• a groove formed in the semiconductor substrate;
• and
• a diffusion layer of a second conduction type formed on a bottom side of the groove on the semiconductor substrate,
• wherein the second gate electrode constitutes a word line, and
• the diffusion layer constitutes a data line.

A semiconductor device comprising:

• (a) a semiconductor substrate including a principal surface and a rear surface opposite to each other in a thickness direction;
• (b) a plurality of first gate electrodes formed on the principal surface of the semiconductor substrate through a first gate dielectric film;
• (c) a plurality of word lines extending in a first direction along the principal surface of the semiconductor substrate, and arranged to be aligned to one another in a second direction crossing the first direction;
• (d) a plurality of second gate electrodes formed by parts of the plurality of word lines, and formed in portions in which the plurality of word lines are overlapped with the plurality of first gate electrodes so as to be insulated from the plurality of first gate electrodes by a second gate dielectric film;
• (e) a plurality of third gate electrodes arranged in every other area among the adjacent electrodes of the plurality of first gate electrodes aligned in the first direction, formed to extend in the second direction along the principal surface of the semiconductor substrate, and formed on the principal surface of the semiconductor substrate through a third gate dielectric film;
• and
• (f) a diffusion layer formed in areas where the third electrodes are not arranged out of a plurality of areas among the adjacent first gate electrodes aligned in the first direction on the principal surface of the semiconductor substrate,
• wherein the diffusion layer is formed at a deeper position than a position of the principal surface of the semiconductor substrate, to which the third gate electrodes are opposed, on the semiconductor substrate.

A semiconductor device comprising:

• (a) a semiconductor substrate including a principal surface and a rear surface opposite to each other in a thickness direction;
• (b) a plurality of first gate electrodes formed on the principal surface of the semiconductor substrate through a first gate dielectric film;
• (c) a plurality of word lines extending in a first direction along the principal surface of the semiconductor substrate, and arranged to be aligned to one another in a second direction crossing the first direction;
• (d) a plurality of second gate electrodes formed by parts of the plurality of word lines, and formed in portions in which the plurality of word lines are overlapped with the plurality of first gate electrodes so as to be insulated from the plurality of first gate electrodes by a second gate dielectric film;
• (e) an isolating unit arranged between adjacent of first gate electrodes of the plurality of first gate electrodes aligned in the first direction;
• and
• (f) a plurality of diffusion layers each formed in area among the adjacent first gate electrodes aligned in the second direction on the principal surface of the semiconductor substrate,
• wherein the adjacent diffusion layers in the second direction among the plurality of diffusion layers differ from each other in a position in a depth direction of the semiconductor substrate.