Tamper barrier for electronic device
AssigneePitney Bowes Inc.
InventorsKjell Heitmann, Douglas Clark, Paul Perreault
Life of this patent
Estimating the term…
Abstract
A tamper protected printed circuit board assembly including a printed circuit board and a partially enveloping tamper wrap covering the entirety of the top surface of the printed circuit board and a first portion of the bottom surface of the printed circuit board, wherein a second portion of the bottom surface of the printed circuit board is not covered by the tamper wrap is provided. The printed circuit board includes two security trace layers each having two security traces thereon, preferably in a serpentine pattern. The tamper wrap and the security traces together cover and prevent tampering with the electronic circuitry of the printed circuit board.
Claims7
A method of manufacturing a printed circuit assembly having tamper detection circuits, said printed circuit board having a first security trace layer having first and second traces thereon, a second security trace layer, adjacent to said first security trace layer, having third and fourth traces thereon, said method comprising:
- mounting circuit components to a top surface of said printed circuit board;
- covering said top surface of said printed circuit board and a first portion of a bottom surface of said printed circuit board with a flexible wrap having fifth and sixth traces thereon, a second portion of said bottom surface of said printed circuit board not being covered by said flexible wrap, said first and second traces of said first security trace layer and said third and fourth traces of said second security trace layer occupying said second portion of said bottom surface of said printed circuit board;
- connecting the first, third and fifth traces in series to from a first tamper detection circuit path;
- connecting said second, fourth and sixth traces in series to form a second tamper detection circuit path;
- wherein said flexible wrap and said first and second security trace layers provide said tamper detection circuits.
Dependencies are inferred from the claim text.