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US 2007/0168902 A1Published application
Method for high-level synthesis of semiconductor integrated circuit
OwnerOsamu Ogawa, Kentaro Shiomi +2inventors
InventorsOsamu Ogawa, Kentaro Shiomi, Yusuke Nemoto, Yuishi Torisaki
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Abstract
A Control Data Flow Graph (CDFG) which is an intermediate representation obtained by analyzing a behavioral-level circuit description of hardware, is subjected to a process of changing a shape of the CDFG by adding an operation before or after scheduling, so as to conceal design information. A CDFG to which a hardware resource has been allocated may be subjected to a process of changing the allocation of the hardware resource.
Claims22
A method for high-level synthesis of a semiconductor integrated circuit, comprising:
- an intermediate representation generating step of analyzing a circuit description at a behavioral level of hardware to generate a Control Data Flow Graph (CDFG) composed of a Data Flow Graph (DFG) representing a flow of an operation and data appearing in the description and a Control Flow Graph (CFG) representing a flow of control of an execution sequence of the operation;
- a scheduling step of allocating an execution sequence of each node of the CDFG to a state synchronizing with a clock, based on information about a design constraint of a desired hardware circuit and an available hardware resource;
- an allocation step of allocating a hardware resource for achieving a process to each node of the CDFG;
- a circuit concealing step of changing the CDFG or a result of the allocation in view of concealment of design information in an output circuit description;
- and
- a circuit description output step of outputting a circuit description and concealment decryption information based on a process result of each step.
3 more elements
Dependencies are inferred from the claim text.