Fully-buffered dual in-line memory module with fault correction
AssigneeMarvell World Trade Ltd.
InventorsSehat Sutardja, Saeed Azimi
Life of this patent
Estimating the term…
Abstract
A memory system comprises first memory that includes memory cells that are selectively refreshed at a refresh rate. A test module tests operation of the memory cells at the refresh rate and that identifies T of the memory cells that are inoperable when refreshed at the refresh rate, where T is an integer greater than zero. Content addressable memory (CAM) includes D CAM memory cells where D is an integer greater than or equal to one. An adaptive refresh module selectively adjusts a refresh rate of the first memory based on T and D.
Claims30
A memory system comprising:
- first memory that includes memory cells that are selectively refreshed at a refresh rate;
- a test module that tests operation of said memory cells at said refresh rate and that identifies T of said memory cells that are inoperable when refreshed at said refresh rate, where T is an integer greater than zero;
- content addressable memory (CAM) that includes D CAM memory cells where D is an integer greater than or equal to one;
- and
- an adaptive refresh module that selectively adjusts a refresh rate of said first memory based on T and D.
A method for operating a memory system comprising:
- providing a first memory that includes memory cells that are selectively refreshed at a refresh rate;
- testing operation of said memory cells at said refresh rate to identify T of said memory cells that are inoperable when refreshed at said refresh rate, where T is an integer greater than zero;
- providing content addressable memory (CAM) that includes D CAM memory cells where D is an integer greater than or equal to one;
- and
- selectively adjusting a refresh rate of said first memory based on T and D.
A memory system comprising:
- first storing means for storing data and for providing memory cells that are selectively refreshed at a refresh rate;
- test means for testing operation of said memory cells at said refresh rate and for identifying T of said memory cells that are inoperable when refreshed at said refresh rate, where T is an integer greater than zero;
- content addressable storing means for storing data and for providing D second memory cells where D is an integer greater than or equal to one;
- and
- adaptive refresh means for selectively adjusting a refresh rate of said first storing means based on T and D.
Dependencies are inferred from the claim text.