Scan string segmentation for digital test compression
AssigneeOn-Chip Technologies, Inc.
InventorLaurence Cooke
Life of this patent
Estimating the term…
Abstract
A new technique to determine the placement of exclusive-ors in each scan string of a chip may be used to achieve improved test vector compression, and this may be used along with methods to minimize the overhead of the exclusive-or logic, to eliminate clock enable logic for multiple scan strings, to minimize the changes to existing test logic insertion and scan string reordering, and to minimize the test vector compression computation time.
Claims11
A method for segmenting a scan string, comprising:
- generating a list of 2N numbers such that said list is larger than the size of the scan string, said generating comprising, starting from a predetermined number, successively doubling the number, and choosing the greater of the number and the number plus one that is unique with respect to any previously-generated numbers;
- and
- segmenting said scan string at the locations of the odd numbers in said list.
A method for compressing test data for a segmented scan string using a compression algorithm, the method comprising:
- using said compression algorithm to independently check any given shift state for a compressed solution to setting a multiplicity of care-in locations in the scan string to some predetermined states given an initial scan state;
- wherein only a predetermined number, K, plus one shift states are checked, starting at the number of said multiplicity of care-in locations minus K, up to the number of said multiplicity of care-in locations.
A variable scan flip-flop comprising:
- a multiplicity of external inputs,
- a multiplicity of external outputs,
- a scan flip-flop,
- an inverter, and
- a 2:1 multiplexer;
- wherein said 2:1 multiplexer's data inputs are connected to both phases of said scan flip-flop's slave latch, said inverter's input is connected one of said multiplicity of external inputs, said multiplexer's output is connected to one of said multiplicity of external outputs, and a control signal to said multiplexer is provided by a signal selected from the group consisting of:
- an input to said inverter and an output of said inverter.
A method of constructing a segmented scan string comprising:
- a) providing a plurality of variable scan flip-flops (VSFFs), each VSFF including at least two inputs, Si and I, and at least two outputs, So and To;
- b) for each VSFF at a segment break, connecting the I input of the VSFF to a data_in signal of the scan string, leaving the So output of the VSFF unconnected, and connecting the To output of the VSFF to the Si input of a next VSFF of the scan string;
- c) for a first VSFF in the scan string, connecting both of said inputs, Si and I, to said data_in signal of said scan string;
- d) for a last VSFF in the scan string, connecting said To output of the VSFF to a data_out signal of the scan string;
- for all other VSFFs of the scan string, connecting each unconnected To output of a VSFF to the next unconnected I input of a next VSFF of the scan string;
- e) connecting the remaining unconnected I input of one VSFF to a To output of a previous VSFF of the scan string;
- and
- f) for all other VSFFs in the scan string, connecting the So output to the Si input of a next VSFF of the scan string.
Dependencies are inferred from the claim text.